Product Information

ADM3485EARZ

ADM3485EARZ electronic component of Analog Devices

Datasheet
RS-422/RS-485 Interface IC 3.3V 15kV ESD Half Duplex 12Mbps

Manufacturer: Analog Devices
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Price (AUD)

1: AUD 1.2931 ( AUD 1.42 Inc GST) ea
Line Total: AUD 1.2931 ( AUD 1.42 Inc GST)

569 - Global Stock
Ships to you between
Mon. 29 Jul to Thu. 01 Aug
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
3651 - Global Stock


Ships to you between Mon. 22 Jul to Fri. 26 Jul

MOQ : 81
Multiples : 1

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ADM3485EARZ
Analog Devices

81 : AUD 2.7444

569 - Global Stock


Ships to you between
Mon. 29 Jul to Thu. 01 Aug

MOQ : 1
Multiples : 1

Stock Image

ADM3485EARZ
Analog Devices

1 : AUD 1.2931
10 : AUD 1.0337
30 : AUD 0.9039
100 : AUD 0.8065
500 : AUD 0.7288
1000 : AUD 0.6897

     
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15 kV ESD-Protected, 3.3 V,12 Mbps, EIA RS-485/RS-422 Transceiver ADM3485E FEATURES FUNCTIONAL BLOCK DIAGRAM TIA/EIA RS-485/RS-422 compliant 15 kV ESD protection on RS-485 input/output pins ADM3485E 12 Mbps data rate Half-duplex transceiver RO R Up to 32 nodes on the bus Receiver open-circuit, fail-safe design Low power shutdown current B RE Outputs high-Z when disabled or powered off Common-mode input range: 7 V to +12 V A DE Thermal shutdown and short-circuit protection Industry-standard 75176 pinout DI D 8-lead narrow SOIC package APPLICATIONS Power/energy metering Telecommunications EMI-sensitive systems Figure 1. Industrial control Local area networks GENERAL DESCRIPTION The ADM3485E is a 3.3 V, low power data transceiver with should be enabled at any time, the output of a disabled or 15 kV ESD protection, suitable for half-duplex communi- powered-down driver is tristated to avoid overloading the bus. cation on multipoint bus transmission lines. The ADM3485E The receiver has a fail-safe feature that ensures a logic high is designed for balanced data transmission and complies with output when the inputs are floating. Excessive power dissipation TIA/EIA standards RS485 and RS-422. The ADM3485E is a caused by bus contention or by output shorting is prevented half-duplex transceiver that shares differential lines and has with a thermal shutdown circuit. separate enable inputs for the driver and the receiver. The part is fully specified over the industrial temperature range The devices have a 12 k receiver input impedance, which and is available in an 8-lead narrow SOIC package. allows up to 32 transceivers on a bus. Because only one driver Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2000-2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 03338-001ADM3485E TABLE OF CONTENTS Features .............................................................................................. 1 Test Circuits and Switching Characteristics ...................................7 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................9 Functional Block Diagram .............................................................. 1 Standards and Testing .................................................................... 11 General Description ......................................................................... 1 ESD Testing ................................................................................. 11 Revision History ............................................................................... 2 Applications Information .............................................................. 12 Specifications ..................................................................................... 3 Differential Data Transmission ................................................ 12 Timing Specifications ....................................................................... 4 Cable and Data Rate ................................................................... 12 Absolute Maximum Ratings ............................................................ 5 Receiver Open-Circuit Fail-Safe ............................................... 12 Thermal Resistance ...................................................................... 5 Outline Dimensions ....................................................................... 13 ESD Caution .................................................................................. 5 Ordering Guide .......................................................................... 13 Pin Configuration and Pin Function Descriptions ...................... 6 REVISION HISTORY 8/10Rev. C to Rev. D Changes to Table 1, Driver, Logic Inputs ...................................... 3 12/06Rev. B to Rev. C Updated Format .................................................................. Universal Removed PDIP Model ....................................................... Universal Changes to Features, Applications, and General Description .... 1 Changes to Specifications ................................................................ 3 Changes to Timing Specifications .................................................. 4 Changes to Absolute Maximum Ratings ....................................... 5 Reorganized Test Circuits and Switching Characteristics Section ..................................................................... 7 Replaced Figure 3 to Figure 11 ....................................................... 7 Deleted Figure 12 to Figure 14 ........................................................ 8 Changes to Figure 15 to Figure 20 .................................................. 9 Changes to Figure 21 and Figure 22 ............................................. 10 Changes to Table 9 .......................................................................... 11 Deleted Figure 24 ............................................................................ 11 Removed Fast Transient Burst Immunity (IEC1000-4-4) Section ................................................................... 12 Updated Outline Dimensions ....................................................... 13 Changes to Ordering Guide .......................................................... 13 10/04Rev. A to Rev. B Updated Format .................................................................. Universal Changes to Power-Supply Current, Table 1 .................................. 3 Updated Outline Dimensions ....................................................... 14 Changes to Ordering Guide .......................................................... 14 5/00Rev. 0 to Rev. A Rev. D Page 2 of 16

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8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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