Product Information

ADL5330ACPZ-REEL7

ADL5330ACPZ-REEL7 electronic component of Analog Devices

Datasheet
RF Amplifier IC Cellular, CDMA2000, W-CDMA, GSM 10MHz ~ 3GHz 24-LFCSP-VQ (4x4)

Manufacturer: Analog Devices
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1: AUD 16.9996 ( AUD 18.7 Inc GST) ea
Line Total: AUD 16.9996 ( AUD 18.7 Inc GST)

460 - Global Stock
Ships to you between
Fri. 19 Jul to Wed. 24 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
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458 - Global Stock


Ships to you between
Fri. 19 Jul to Wed. 24 Jul

MOQ : 1
Multiples : 1

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ADL5330ACPZ-REEL7
Analog Devices

1 : AUD 16.9832
10 : AUD 14.9989
30 : AUD 12.6526
100 : AUD 11.6364

     
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GBP - Gain Bandwidth Product
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10 MHz to 3 GHz VGA with 60 dB Gain Control Range Data Sheet ADL5330 FEATURES FUNCTIONAL BLOCK DIAGRAM Voltage controlled amplifier/attenuator GAIN ENBL VPS2 VPS2 VPS2 VPS2 Operating frequency 10 MHz to 3 GHz VPS1 VPS2 Optimized for controlling output power GAIN High linearity: OIP3 31 dBm at 900 MHz CONTROL COM1 COM2 Output noise floor: 150 dBm/Hz at 900 MHz 50 input and output impedances INHI O/P OPHI INPUT Single-ended or differential operation (TZ) RFOUT RFIN GM STAGE Wide gain control range: 34 dB to +22 dB at 900 MHz STAGE INLO OPLO BALUN Linear in dB gain control function, 20 mV/dB Single-supply 4.75 V to 5.25 V COM1 COM2 BIAS AND VREF APPLICATIONS VPS1 VPS2 Transmit and receive power control at RF and IF VREF IPBS OPBS COM1 COM2 COM2 Figure 1. GENERAL DESCRIPTION The ADL5330 is a high performance, voltage controlled, variable The output of the high accuracy wideband attenuator is applied gain amplifier (VGA)/attenuator for use in applications with to a differential transimpedance output stage. The output stage frequencies up to 3 GHz. The balanced structure of the signal sets the 50 differential output impedances and drives the path minimizes distortion while it also reduces the risk of OPHI and OPLO pins. The ADL5330 has a power-down function. It can be powered down by a Logic LO input on the spurious feedforward at low gains and high frequencies caused by parasitic coupling. While operation between a balanced source ENBL pin. The current consumption in power-down mode is and load is recommended, a single sided input is internally 250 A. converted to differential form. The ADL5330 is fabricated on an Analog Devices, Inc., The input impedance is 50 from INHI to INLO. The outputs proprietary high performance, complementary bipolar IC process. are usually coupled into a 50 grounded load via a 1:1 balun. A The ADL5330 is available in a 24-lead (4 mm 4 mm), Pb-free single supply of 4.75 V to 5.25 V is required. LFCSP package and is specified for operation from ambient temperatures of 40C to +85C. An evaluation board is also The 50 input system converts the applied voltage to a pair of available. differential currents with high linearity and good common rejection even when driven by a single sided source. The signal currents are then applied to a proprietary voltage controlled attenuator providing precise definition of the overall gain under the control of the linear in dB interface. The GAIN pin accepts a voltage from 0 V at minimum gain to 1.4 V at full gain with a 20 mV/dB scaling factor. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20052017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com CONTINUOUSLY VARIABLE ATTENUATOR 05134-001ADL5330 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Basic Connections ...................................................................... 13 Applications ....................................................................................... 1 RF Input/Output Interface ........................................................ 14 Functional Block Diagram .............................................................. 1 Gain Control Input .................................................................... 15 General Description ......................................................................... 1 Automatic Gain Control ............................................................ 15 Revision History ............................................................................... 2 Interfacing to an IQ Modulator ................................................ 17 Specif icat ions ..................................................................................... 3 WCDMA Transmit Application ............................................... 18 Absolute Maximum Ratings ............................................................ 5 CDMA2000 Transmit Application ........................................... 19 ESD Caution .................................................................................. 5 Soldering Information ............................................................... 19 Pin Configuration and Function Descriptions ............................. 6 Evaluation Board ........................................................................ 20 Typical Performance Characteristics ............................................. 7 Outline Dimensions ....................................................................... 24 Theory of Operation ...................................................................... 12 Ordering Guide .......................................................................... 24 Applications Information .............................................................. 13 REVISION HISTORY 11/2017Rev. A to Rev. B Changed LFCSP VQ to LFCSP ................................... Throughout Changes to Figure 2 and Table 3 ..................................................... 6 Updated Outline Dimensions ....................................................... 24 Changes to Ordering Guide .......................................................... 24 6/2005Rev. 0 to Rev. A Changes to Figure 1 .......................................................................... 1 Changes to Table 1 ............................................................................ 3 Changes to Table 2 ............................................................................ 5 Changes to Table 3 ............................................................................ 6 Changes to Figure 27 ...................................................................... 11 Changes to Figure 35 ...................................................................... 14 Changes to the Gain Control Input Section ................................ 15 Changes to Figure 42 ...................................................................... 17 4/2005Revision 0: Initial Version Rev. B Page 2 of 24

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8542.33.00 43 No -- Amplifiers

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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