Data Sheet ADIN1110 Robust, Industrial, Low Power 10BASE-T1L Ethernet MAC-PHY FEATURES APPLICATIONS 10BASE-T1L IEEE Standard 802.3cg-2019 compliant Field instruments Flow meters Integrated MAC with SPI SPI supporting 10 Mbps full duplex Pressure and temperature transducers Supports OPEN Alliance 10BASE-T1x MAC-PHY serial Building automation interface Actuators Low power consumption: dual supply 42 mW typical Fire panels Supports 1.0 V p-p and 2.4 V p-p transmit levels Elevators Autonegotiation capability Edge node sensors Supports intrinsic safety applications Factory automation External termination resistors GENERAL DESCRIPTION Separate receive and transmit pins MDIO memory map accessible via SPI The ADIN1110 is an ultra low power, single port, 10BASE-T1L transceiver design for industrial Ethernet applications and is com- On-chip FIFOs: 20 kB receive, 8 kB transmit (configurable) pliant with the IEEE 802.3cg-2019 Ethernet standard for long Cut through or store and forward operation reach, 10 Mbps single pair Ethernet (SPE). Featuring an integrated Receive high and low priority queues media access control (MAC) interface, the ADIN1110 enables direct IEEE 1588 timestamp support connectivity with a variety of host controllers via a serial peripheral Statistics counters interface (SPI). This SPI enables the use of lower power processors 16 MAC addresses supported for frame filtering without an integrated MAC, which provides for the lowest overall system level power consumption. The ADIN1110 is designed for Unmanaged configuration using pin strapping including edge node sensors and field instruments deployed in building, Master/slave selection factor, and process automation. Transmit amplitude 25 MHz crystal oscillator/25 MHz external clock input The device operates from a single power supply rail of 1.8 V or 3.3 V. Supporting both 1.0 V and 2.4 V amplitude modes of opera- Single supply 1.8 V/3.3 V operation (mode dependent) tions and external termination resistors, the ADIN1110 supports use Cable reach within intrinsically safe environments. The programmable transmit Up to 1700 meters with 1.0 V p-p levels, external termination resistors, and independent receive and Up to 1700 meters with 2.4 V p-p transmit pins make the ADIN1110 suited to intrinsic safety applica- EMC test standards tions. IEC 61000-4-4 electrical fast transient (4 kV) The ADIN1110 has an integrated voltage supply monitoring and IEC 61000-4-2 ESD (4 kV contact discharge) power-on reset (POR) circuitry to improve system level robustness, IEC 61000-4-2 ESD (8 kV air discharge) and has a 4-wire SPI for communication between the MAC inter- IEC 61000-4-6 conducted immunity (10 V/m) face and host processor. IEC 61000-4-5 surge (4 kV) The ADIN1110 is available in a 40-lead, 6 mm 6 mm lead frame IEC 61000-4-3 radiated immunity (Class A) chip scale package (LFCSP). EN55032 radiated emissions (Class B) Table 1. Related Products Link LED Product Description Small package: 40-lead (6 mm 6 mm) LFCSP ADIN1100 Robust, industrial, low power 10BASE-T1L Ethernet PHY in Wide temperature range: 40C to +105C 40-lead (6 mm 6 mm) LFCSP Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliableas i. However, no responsibility is assumed by Analog DOCUMENT FEEDBACK Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and TECHNICAL SUPPORT registered trademarks are the property of their respective owners.Data Sheet ADIN1110 TABLE OF CONTENTS Features................................................................ 1 On-Chip Diagnostics............................................21 Applications........................................................... 1 Loopback Modes..............................................21 General Description...............................................1 Frame Generator and Checker........................ 22 Functional Block Diagram......................................3 Test Modes.......................................................23 Specifications........................................................ 4 Applications Information...................................... 24 Timing Characteristics........................................... 6 System Level Power Management...................24 Power-Up Timing................................................6 LED Circuit Examples...................................... 24 SPI......................................................................6 Component Recommendations........................25 Absolute Maximum Ratings...................................8 802.1AS Support..............................................26 Thermal Resistance........................................... 8 Electromagnetic Compatibility (EMC) and Electrostatic Discharge (ESD) Ratings...............8 Electromagnetic Immunity (EMI).................... 27 ESD Caution.......................................................8 MAC SPI..............................................................28 Pin Configuration and Function Descriptions........ 9 Generic SPI Protocol........................................28 Typical Performance Characteristics................... 11 OPEN Alliance SPI Protocol.............................31 Theory of Operation.............................................12 Frame Filtering on Receive.............................. 38 Power Supply Domains....................................12 SPI Access to the PHY Registers.................... 39 MAC ................................................................ 12 Registers............................................................. 42 Autonegotiation................................................ 12 SPI Register Map............................................. 42 MDI Interface....................................................13 PHY Clause 22 Register Details...................... 65 Reset Operation............................................... 13 PHY Clause 45 Register Map.......................... 68 LED Functions..................................................14 PCB Layout Recommendations........................ 103 Link Status Pin................................................. 15 Package Layout..............................................103 Power-Down Modes.........................................15 Component Placement and Routing.............. 103 Hardware Configuration Pins...............................16 Crystal Placement and Routing......................103 Hardware Configuration Pin Functions.............16 PCB Stack......................................................103 Bringing Up 10BASE-T1L Links.......................... 18 Outline Dimensions........................................... 104 Unmanaged PHY Operation.............................18 Ordering Guide...............................................104 Managed PHY Operation................................. 18 REVISION HISTORY 10/2021Revision 0: Initial Version analog.com Rev. 0 2 of 104