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AD9912ABCPZ

AD9912ABCPZ electronic component of Analog Devices

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Analog Devices Data Acquisition ADCsDACs - Specialized 1 GSPS Direct Digtl Synth w 14-Bit

Manufacturer: Analog Devices
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1: AUD 78.6662 ( AUD 86.53 Inc GST) ea
Line Total: AUD 78.6662 ( AUD 86.53 Inc GST)

46 - Global Stock
Ships to you between
Mon. 29 Jul to Thu. 01 Aug
MOQ: 1  Multiples: 1
Pack Size: 1
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46 - Global Stock


Ships to you between
Mon. 29 Jul to Thu. 01 Aug

MOQ : 1
Multiples : 1

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AD9912ABCPZ
Analog Devices

1 : AUD 78.6662
3 : AUD 71.2343
30 : AUD 68.1357

     
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1 GSPS Direct Digital Synthesizer with 14-Bit DAC AD9912 FEATURES APPLICATIONS 1 GSPS internal clock speed (up to 400 MHz output directly) Agile LO frequency synthesis Integrated 1 GSPS 14-bit DAC Low jitter, fine tune clock generation 48-bit frequency tuning word with 4 Hz resolution Test and measurement equipment Differential HSTL comparator Wireless base stations and controllers Flexible system clock input accepts either crystal or external Secure communications reference clock Fast frequency hopping On-chip low noise PLL REFCLK multiplier 2 SpurKiller channels GENERAL DESCRIPTION Low jitter clock doubler for frequencies up to 750 MHz The AD9912 is a direct digital synthesizer (DDS) that features Single-ended CMOS comparator frequencies of <150 MHz an integrated 14-bit digital-to-analog converter (DAC). The Programmable output divider for CMOS output AD9912 features a 48-bit frequency tuning word (FTW) that Serial I/O control can synthesize frequencies in step sizes no larger than 4 Hz. Excellent dynamic performance Absolute frequency accuracy can be achieved by adjusting the Software controlled power-down DAC system clock. Available in two 64-lead LFCSP packages The AD9912 also features an integrated system clock phase- Residual phase noise 250 MHz locked loop (PLL) that allows for system clock inputs as low 10 Hz offset: 113 dBc/Hz as 25 MHz. 1 kHz offset: 133 dBc/Hz 100 kHz offset: 153 dBc/Hz The AD9912 operates over an industrial temperature range, 40 MHz offset: 161 dBc/Hz spanning 40C to +85C. BASIC BLOCK DIAGRAM AD9912 DAC OUT STARTUP S1 TO S4 CONFIGURATION LOGIC FILTER DIRECT FDBK IN DIGITAL SYNTHESIS CORE OUT CLOCK DIGITAL SERIAL PORT, OUTPUT INTERFACE I/O LOGIC DRIVERS OUT CMOS SYSTEM CLOCK MULTIPLIER Figure 1. Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20072010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 06763-001AD9912 TABLE OF CONTENTS Features .............................................................................................. 1 Default Output Frequency on Power-Up ................................ 25 Applications ....................................................................................... 1 Power Supply Partitioning ............................................................. 26 General Description ......................................................................... 1 3.3 V Supplies .............................................................................. 26 Basic Block Diagram ........................................................................ 1 1.8 V Supplies .............................................................................. 26 Revision History ............................................................................... 3 Serial Control Port ......................................................................... 27 Specif icat ions ..................................................................................... 4 Serial Control Port Pin Descriptions ....................................... 27 DC Specifications ......................................................................... 4 Operation of Serial Control Port .............................................. 27 AC Specifications .......................................................................... 6 The Instruction Word (16 Bits) ................................................ 28 Absolute Maximum Ratings ............................................................ 8 MSB/LSB First Transfers ........................................................... 28 Thermal Resistance ...................................................................... 8 I/O Register Map ............................................................................ 31 ESD Caution .................................................................................. 8 I/O Register Descriptions .............................................................. 33 Pin Configuration and Function Descriptions ............................. 9 Serial Port Configuration (Register 0x0000 to Register 0x0005) ......................................................................... 33 Typical Performance Characteristics ........................................... 11 Power-Down and Reset (Register 0x0010 to Input/Output Termination Recommendations .......................... 16 Register 0x0013) ......................................................................... 33 Theory of Operation ...................................................................... 17 System Clock (Register 0x0020 to Register 0x0022) ............. 34 O ver vie w ...................................................................................... 17 CMOS Output Divider (S-Divider) (Register 0x0100 to Direct Digital Synthesizer (DDS) ............................................. 17 Register 0x0106) ......................................................................... 35 Digital-to-Analog (DAC) Output ............................................ 18 Frequency Tuning Word (Register 0x01A0 to Reconstruction Filter ................................................................. 18 Register 0x01AD) ....................................................................... 35 FDBK IN Inputs ........................................................................ 19 Doubler and Output Drivers (Register 0x0200 to Register 0x0201) ......................................................................... 37 SYSCLK Inputs ........................................................................... 20 Calibration (User-Accessible Trim) (Register 0x0400 to Output Clock Drivers and 2 Frequency Multiplier ............. 22 Register 0x0410) ......................................................................... 37 Harmonic Spur Reduction ........................................................ 22 Harmonic Spur Reduction (Register 0x0500 to Thermal Performance .................................................................... 24 Register 0x0509) ......................................................................... 37 Power-Up ......................................................................................... 25 Outline Dimensions ....................................................................... 39 Power-On Reset .......................................................................... 25 Ordering Guide .......................................................................... 39 Rev. F Page 2 of 40

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8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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