Low Voltage, 10-Bit Digital Temperature a Sensor in 8-Lead MSOP AD7314 FUNCTIONAL BLOCK DIAGRAM FEATURES 10-Bit Temperature-to-Digital Converter 35 C to +85 C Operating Temperature Range BAND GAP 10-BIT 2 C Accuracy TEMPERATURE ANALOG-TO-DIGITAL SPI and DSP Compatible Serial Interface CONVERTER SENSOR ID Shutdown Mode Space-Saving MSOP Package GND V DD TEMPERATURE VALUE APPLICATIONS AD7314 REGISTER Hard Disk Drives Personal Computers CE SERIAL Electronic Test Equipment SCLK BUS SDI Office Equipment INTERFACE SDO Domestic Appliances Process Control Mobile Phones GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD7314 is a complete temperature monitoring system in 1. The AD7314 has an on-chip temperature sensor that allows an 8-lead MSOP package. It contains a band gap temperature an accurate measurement of the ambient temperature. The sensor and 10-bit ADC to monitor and digitize the temperature measurable temperature range is 35C to +85C, with a reading to a resolution of 0.25C. 2C temperature accuracy. The AD7314 has a flexible serial interface that allows easy 2. Supply voltage of 2.65 V to 5.5 V. interfacing to most microcontrollers. The interface is compat- 3. Space-saving 8-lead MSOP package. ible with SPI, QSPI, and MICROWIRE protocols and is 4. 10-bit temperature reading to 0.25C resolution. also compatible with DSPs. The part features a standby mode that is controlled via the serial interface. 5. The AD7314 features a standby mode that reduces the current consumption to 1mA max. The AD7314s low supply current and SPI compatible interface make it ideal for a variety of applications, including personal computers, office equipment, and domestic appliances. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. may result from its use. No license is granted by implication or otherwise Tel: 781/329-4700 www.analog.com under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Fax: 781/326-8703 2003 Analog Devices, Inc. All rights reserved.* (T = T to T , V = 2.65 V to 5.5 V, unless otherwise noted.) AD7314SPECIFICATIONS A MIN MAX DD Parameter Min Typ Max Unit Test Conditions/Comments TEMPERATURE SENSOR AND ADC Accuracy 2.0 CT = 35C to +85 C. V = 2.65 V to 2.9 V A DD 1.0 CT = 35C to +85C. V = 3 V to 5.5 V A DD Resolution 10 Bits Update Rate, t 400 ms R Temperature Conversion Time 25 ms SUPPLIES Supply Voltage 2.65 5.5 V For Specified Performance Supply Current Normal Mode (Inactive) 250 300 mA Part Not Converting, V = 2.65 V to 2.9 V DD 275 mA Part Not Converting, V = 3 V to 5.5 V DD Normal Mode (Active) 1 mA Part Converting, V = 2.65 V to 2.9 V DD 1.2 mA Part Converting, V = 3 V to 5.5 V DD Shutdown Mode 1 mAV = 2.65 V to 2.9 V DD 1 mAV = 3 V to 5.5 V DD Power Dissipation 860 mWV = 2.65 V. Using Normal Mode DD (Auto Conversion) Power Dissipation V = 2.65 V. Using Shutdown Mode DD 1 SPS 3 mW 10 SPS 3.3 mW 100 SPS 6 mW DIGITAL INPUT Input High Voltage, V 1.85 V V = 2.65 V to 2.9 V IH DD Input Low Voltage, V 0.53 V V = 2.65 V to 2.9 V IL DD Input High Voltage, V 2.4 V V = 3 V to 5.5 V IH DD Input Low Voltage, V 0.8 V V = 3 V to 5.5 V IL DD Input Current, I 1 mAV = 0 V to V IN IN DD Input Capacitance, C 10 pF All Digital Inputs IN DIGITAL OUTPUT Output High Voltage, V 2.4 V I = I = 200 mA OH SOURCE SINK Output Low Voltage, V 0.4 V I = 200 mA OL OL Output Capacitance, C 50 pF OUT *All specifications apply for 35 C to +85 C, unless otherwise noted. Specifications subject to change without notice. 1, 2 3 TIMING CHARACTERISTICS (T = T to T , V = 2.65 V to 5.5 V, unless otherwise noted. See Figure 1.) A MIN MAX DD Parameter Limit Unit Comments t 0 ns min CE to SCLK Setup Time 1 t 50 ns min SCLK High Pulse Width 2 t 50 ns min SCLK Low Pulse Width 3 4 t 35 ns max Data Access Time after SCLK Rising Edge 4 t 20 ns min Data Setup Time prior to SCLK Falling Edge 5 t 0 ns min Data Hold Time after SCLK Falling Edge 6 t 0 ns min CE to SCLK Hold Time 7 4 t 40 ns max CE to SDO High Impedance 8 NOTES 1 Guaranteed by design and characterization, not production tested. 2 All input signals are specified with tr = tf = 5 ns (10% to 90% of V ) and are timed from a voltage level of 1.6 V. DD 3 All specifications apply for 35 C to +85 C, unless otherwise noted. 4 Measured with the load circuit of Figure 2. Specifications subject to change without notice. 2 REV. A