PRELIMINARY PRODUCT SPECIFICATION 1 Z86C61/62/96 1 CMOS Z8 MICROCONTROLLER FEATURES n All Digital Inputs are TTL Levels ROM RAM* I/O Device (KB) (Bytes) Lines n Auto Latches Z86C61 16 236 32 n RAM and ROM Protect Z86C62 16 236 52 Z86C96 16 236 52 n Two Programmable 8-Bit Counter/Timers, Note: *General-Purpose n Each with 6-Bit Programmable Prescaler n 3.0V to 5.5V Operating Range n Six Vectored, Priority Interrupts from Eight Different Sources n Low Power Consumption: 200 mW (max) n Clock Speeds: 16 and 20 MHz n Fast Instruction Pointer: 0.75 s 16 MHz n On-Chip Oscillator that Accepts a Crystal, Ceramic n Two Standby Modes: STOP and HALT Resonator, LC, or External Clock Drive n Full-Duplex UART GENERAL DESCRIPTION The Z86C61/62/96 microcontroller is a member of the Z8 The Z86C61/62/96 architecture is characterized by Zilogs single-chip microcontroller family with 16 KB of ROM and 8-bit microcontroller core. The device offers a flexible I/O 236 bytes of RAM. The Z86C96 is ROMless. scheme, an efficient register and address space structure, multiplexed capabilities between address/data, I/O, and a The Z86C61 is offered in 40-pin DIP and 44-pin PLCC style number of ancillary features that are useful in many indus- packages, however, the ROMless pin option is available trial and advanced scientific applications. on the 44-pin version only. The Z86C62/96 is offered in 64- pin DIP and 68-pin PLCC style packages. A ROMless pin For applications which demand powerful I/O capabilities, option enables these MCUs to address both external mem- the Z86C61 fulfills this with 32 pins dedicated to input and ory and preprogrammed ROM, making them well-suited for output. These lines are grouped into four ports with eight high-volume applications or where code flexibility is re- lines each. The Z86C62/96 has 52 pins for input and out- quired. put, and these lines are grouped into six, 8-bit ports and one 4-bit port. Each port is configurable under software With 16 KB of ROM and 236 bytes of general-purpose control to provide timing, status signals, serial or parallel RAM, these low-cost, low power consumption CMOS I/O with or without handshake, and an address/data bus for Z86C61/62/96 MCUs offer fast execution, efficient use of interfacing external memory. memory, sophisticated interrupts, input/output bit manipu- lation capabilities, and easy hardware/software system ex- There are three basic address spaces available to support pansion. this configuration: Program Memory, Data Memory, and 236 General-Purpose Registers. DS97Z8X1600 P R E L I M I N A R Y 1Z86C61/62/96 CMOS Z8 Microcontroller Zilog GENERAL DESCRIPTION (Continued) To unburden the program from coping with the real-time Power connections follow conventional descriptions be- tasks, such as counting/timing and serial data communica- low: tion, the Z86C61/62/96 offers two on-chip counter/timers with a large number of user selectable modes, and an on- Connection Circuit Device board UART (Figures 1, 2, and 3). Power V V CC DD Notes: All Signals with a preceding front slash,, are ac- Ground GND V SS tive Low. For example B//W (WORD is active Low) /B/W (BYTE is active Low, only). XTAL /AS /DS R//W /RESET Vcc GND Output Input Machine Timing and Port 3 Instruction Control UART ALU FLAGS Counter/ Prg. Memory Timers 16,384 (2) x 8-Bit Register Pointer Interrupt Control Program Register File Counter 256 x 8-Bit Port 2 Port 0 Port 1 4 4 8 I/O Address or I/O Address/Data or I/O (Bit Programmable) (Nibble Programmable) (Byte Programmable) Figure 1. Z86C61 Functional Block Diagram 2 P R E L I M I N A R Y DS97Z8X1600