STD3NM60N STMicroelectronics

STD3NM60N N-channel 600 V, 1.6 , 3.3 A, MDmesh II Power MOSFET in DPAK package Datasheet preliminary data Features V R DSS DS(on) Order codes I D T max max. J STD3NM60N 650 V < 1.8 3.3 A TAB 3 100% avalanche tested 1 Low input capacitance and gate charge DPAK Low gate input resistance Applications Switching applications Description Figure 1. Internal schematic diagram This device is an N-channel Power MOSFET developed using the second generation of MDmesh technology. This revolutionary Power 4 OR MOSFET associates a vertical structure to the companys strip layout to yield one of the worlds lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. 3 - V Table 1. Device summary Order codes Marking Package Packaging STD3NM60N 3NM60N DPAK Tape and reel May 2012 Doc ID 023056 Rev 1 1/15 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to www.st.com 15 change without notice. Contents STD3NM60N Contents 1 Electrical ratings 3 2 Electrical characteristics . 4 2.1 Electrical characteristics (curves) 6 3 Test circuits 8 4 Package mechanical data . 9 5 Packaging mechanical data 12 6 Revision history . 14 2/15 Doc ID 023056 Rev 1