CY28323
CY28323PVC
FTG for Intel Pentium 4 CPU and Chipsets
Support SMBus byte read/write and block read/ write
Features
operations to simplify system BIOS development
Compatible to Intel CK-Titan & CK-408 Clock Synthe-
Vendor ID and Revision ID support
sizer/Driver Specifications
Programmable drive strength support
System frequency synthesizer for Intel Brookdale 845
Programmable output skew support
and Brookdale - G Pentium 4 Chipsets
Power management control inputs
Programmable clock output frequency with less than
1 MHz increment
Available in 48-pin SSOP
Integrated fail-safe Watchdog timer for system
recovery
CPU 3V66 PCI REF 48M 24_48M
Automatically switch to HW selected or SW
x 3 x 4 x 10 x 2 x 1 x 1
programmed clock frequency when watchdog timer
time-out
Capable of generating system RESET after a Watchdog
timer time-out occurs or a change in output frequency
via SMBus interface
[[1]]
Block Diagram Pin Configuration
VDD_REF
X1
XTAL
REF0:1
X2 OSC
PLL Ref Freq
*MULTSEL1/REF1 1 48 REF0/MULTSEL0*
Divider
VDD_CPU
PLL 1
Network VDD_REF 2 47 GND_REF
CPU0:1, CPU0:1#,
X1 3 46 VDD_CPU
CPU_ITP, CPU_ITP#
*FS0:4 X2 4 45 CPU_ITP
VTT_PWRGD#
GND_PCI 5 44 CPU_ITP#
*FS2/PCI_F0 6 43 GND_CPU
*MULTSEL0:1
*FS3/PCI_F1 7 42 PWR_DWN#
PCI_F2 8 41 CPU0
VDD_PCI 9 40 CPU0#
VDD_3V66
*FS4/PCI0 10 39 VDD_CPU
3V66_0:3
PCI1 11 38 CPU1
PCI2 12 37 CPU1#
PWR_DWN#
GND_PCI 13 36 GND_CPU
VDD_PCI
PCI3 14 35 IREF
PCI_F0:2
PCI4 15 34 VDD_CORE
PCI0:6
PCI5 16 33 GND_CORE
PCI6 17 32 VDD_3V66
VDD_PCI 18 31 3V66_0
VTT_PWRGD# 19 30 3V66_1
VDD_48MHz
48MHz
RST# 20 29 GND_3V66
PLL2
GND_48MHz 21 28 3V66_2
*FS0/48MHz 22 27 3V66_3
24_48MHz
*FS1/24_48MHz 23 26 SCLK
2
24 25
VDD_48MHz SDATA
SDATA
SMBus
SCLK
Logic RST#
SSOP-48
Note:
1. Signals marked with * and ^ has internal pull-up and pull-down resistors respectively.
....Document #: 38-07004 Rev. *B Page Page 1 of 21 of 21
400 West Cesar Chavez, Austin, TX 78701 1+(512) 416-8500 1+(512) 416-9669 www.silabs.com
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CY28323PVC
Pin Definitions
Pin
Pin Name Pin No. Type Pin Description
X1 3 I Crystal Connection or External Reference Frequency Input: This pin has dual
functions. It can be used as an external 14.318-MHz crystal connection or as an
external reference frequency input.
X2 4 O Crystal Connection: Connection for an external 14.318-MHz crystal. If using an
external reference, this pin must be left unconnected.
REF0/MULTSEL0 48 I/O Reference Clock 0/Current Multiplier Selection 0: 3.3V 14.318-MHz clock
output. This pin also serves as a power-on strap option to determine the current
multiplier for the CPU clock outputs. The MULTSEL1:0 definitions are as follows:
MULTSEL1:0
00 = Ioh is 4 x IREF
01 = Ioh is 5 x IREF
10 = Ioh is 6 x IREF
11 = Ioh is 7 x IREF
REF1/MULTSEL1 1 I/O Reference Clock 1/Current Multiplier Selection 1: 3.3V 14.318-MHz clock
output. This pin also serves as a power-on strap option to determine the current
multiplier for the CPU clock outputs. The MULTSEL1:0 definitions are as follows:
MULTSEL1:0
00 = Ioh is 4 x IREF
01 = Ioh is 5 x IREF
10 = Ioh is 6 x IREF
11 = Ioh is 7 x IREF
CPU0:1, CPU0:1# 41, 38, 40, O CPU Clock Outputs: Frequency is set by the FS0:4 inputs or through serial input
37 interface.
CPU_ITP, 44, 45 I/O CPU Clock Output for ITP: Frequency is set by the FS0:4 inputs or through
CPU_ITP# serial input interface.
3V66_0:3 31, 30, 28, O 66-MHz Clock Outputs: 3.3V fixed 66-MHz clock.
27
PCI_F0/FS2 6 I/O Free-running PCI Output 0/Frequency Select 2: 3.3V free-running PCI output.
This pin also serves as a power-on strap option to determine device operating
frequency as described in the Frequency Selection Table.
PCI_F1/FS3 7 I/O Free-running PCI Output 1/Frequency Select 3: 3.3V free-running PCI output.
This pin also serves as a power-on strap option to determine device operating
frequency as described in the Table 4.
PCI_F2 8 I/O Free-running PCI Output 2: 3.3V free-running PCI output.
PCI0/FS4 10 I/O PCI Output 0/Frequency Select 4: 3.3V PCI output. This pin also serves as a
power-on strap option to determine device operating frequency as described in
Table 4.
PCI1:6 11, 12, 14, O PCI Clock Output 1 to 6: 3.3V PCI clock outputs.
15, 16, 17
48MHz/FS0 22 I/O 48-MHz Output/Frequency Select 0: 3.3V fixed 48-MHz, non-spread spectrum
output. This pin also serves as a power-on strap option to determine device
operating frequency as described in Table 4.
This output will be used as the reference clock for USB host controller in Intel 845
(Brookdale) platforms. For Intel Brookdale - G platforms, this output will be used
as the VCH reference clock.
24_48MHz/FS1 23 I/O 24- or 48-MHz Output/Frequency Select 1: 3.3V fixed 24-MHz or 48-MHz
non-spread spectrum output. This pin also serves as a power-on strap option to
determine device operating frequency as described in Table 4.
This output will be used as the reference clock for SIO devices in Intel 845
(Brookdale) platforms. For Intel Brookdale - G platforms, this output will be used
as the reference clock for both USB host controller and SIO devices. We
recommend system designer to configure this output as 48 MHz and HIGH
Drive by setting Byte [5], Bit [0] and Byte [9], Bit [7], respectively.
... Document #: 38-07004 Rev. *B Page Page 2 of 21 of 21