74AHC1G32GW,125 Nexperia

74AHC1G32 74AHCT1G32 2-input OR gate Rev. 10 11 January 2022 Product data sheet 1. General description The 74AHC1G32 74AHCT1G32 is a single 2-input OR gate. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. 2. Features and benefits Wide supply voltage range from 2.0 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity CMOS low power dissipation Latch-up performance exceeds 100 mA per JESD 78 Class II Level A Symmetrical output impedance Balanced propagation delays Input levels: For 74AHC1G32: CMOS level For 74AHCT1G32: TTL level ESD protection: HBM JESD22-A114E: exceeds 2000 V MM JESD22-A115-A: exceeds 200 V CDM JESD22-C101C: exceeds 1000 V Specified from -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC1G32GW -40 C to +125 C TSSOP5 plastic thin shrink small outline package 5 leads SOT353-1 body width 1.25 mm 74AHCT1G32GW 74AHC1G32GV -40 C to +125 C SC-74A plastic surface-mounted package 5 leads SOT753 74AHCT1G32GVNexperia 74AHC1G32 74AHCT1G32 2-input OR gate 4. Marking Table 2. Marking codes Type number Marking code 1 74AHC1G32GW AG 74AHCT1G32GW CG 74AHC1G32GV A32 74AHCT1G32GV C32 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1 B 1 1 Y 4 4 2 A 2 mna164 mna165 Fig. 1. Logic symbol Fig. 2. IEC logic symbol B Y A mna166 Fig. 3. Logic diagram 6. Pinning information 6.1. Pinning 74AHC1G32 74AHCT1G32 B 1 5 V CC A 2 GND 3 4 Y 001aak129 Fig. 4. Pin configuration SOT353-1 (TSSOP5) and SOT753 (SC-74A) 74AHC AHCT1G32 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2022. All rights reserved Product data sheet Rev. 10 11 January 2022 2 / 11