CLA20EF1200PZ advanced V = 1200 V DRM High Efficiency Thyristor I = 20 A TAV V = 1.4 V T Triode Single Reverse Conducting Thyristor Part number CLA20EF1200PZ Marking on Product: CLA20EF1200PZ Backside: anode 4 3 1 Features / Advantages: Applications: Package: TO-263 (D2Pak-HV) Thyristor for fast turn-on switching Ignition for HD lamps Industry standard outline Integrated free wheeling diode Capacity discharge RoHS compliant Planar passivated chip Epoxy meets UL 94V-0 Long-term stability Disclaimer Notice Information furnished is believed to be accurate and reliable. However, users should independently evaluate the suitability of and test each product selected for their own applications. Littelfuse products are not designed for, and may not be used in, all applications. Read complete Disclaimer Notice at www.littelfuse.com/disclaimer-electronics. IXYS reserves the right to change limits, conditions and dimensions. Data according to IEC 60747and per semiconductor unless otherwise specified 20190212b 2019 IXYS all rights reservedCLA20EF1200PZ advanced Ratings Thyristor Symbol Definition Conditions min. typ. max. Unit T = 25C 1300 V V max. non-repetitive forward blocking voltage DSM VJ T = 25C 1200 V V max. repetitive forward blocking voltage DRM VJ I drain current V = 1 2 0 0 V T = 25C 10 A D D VJ V = 1 2 0 0 V T = 1 2 5 C 1 mA D VJ forward voltage drop V I = 2 0 A T = 25C 1.40 V T T VJ Note: I = 4 0 A 1.60 V T reverse voltage drop ~1.2 x VT T = C 1.40 V I = 2 0 A 125 T VJ I = 4 0 A 1.60 V T average forward current T = 1 1 5 C T = 1 5 0 C 20 A I TAV C VJ DC V T = 1 5 0 C 0.90 V threshold voltage T0 VJ for power loss calculation only slope resistance r 25 m T 0.65 K/W R thermal resistance junction to case thJC thermal resistance case to heatsink R 0.25 K/W thCH P total power dissipation T = 25C 190 W tot C max. forward surge current t = 10 ms (50 Hz), sine T = 45C 120 A I TSM VJ t = 8,3 ms (60 Hz), sine V = 0 V 130 A R t = 10 ms (50 Hz), sine T = 1 5 0 C A 100 VJ t = 8,3 ms (60 Hz), sine V = 0 V 110 A R value for fusing It t = 10 ms (50 Hz), sine T = 45C 72 As VJ t = 8,3 ms (60 Hz), sine V = 0 V 70 As R t = 10 ms (50 Hz), sine T = 1 5 0 C 50 As VJ t = 8,3 ms (60 Hz), sine V = 0 V 50 As R junction capacitance V = 4 0 0 V f = 1 MHz T = 25C 6 pF C J R VJ P max. gate power dissipation t = 30 s T = 1 5 0 C 10 W GM P C t = 300 s 5 W P 0.5 W P average gate power dissipation GAV critical rate of rise of current T = 150C f = 50 Hz repetitive, I = 60 A 500 (di/dt) A/s cr VJ T 0.5 t = 1 s di /dt = A/s I = 6 0 0 A P G TSA I = 0.07A V = V non-repet., I = 20 A 1500 A/s G DRM T critical rate of rise of voltage V = V T = 150C 500 V/s (dv/dt) VJ cr DRM R = method 1 (linear voltage rise) GK gate trigger voltage V V = 6 V T = 25C 1.3 V GT D VJ T = -40C 1.6 V VJ gate trigger current V = 6 V T = 25C 20 mA I VJ GT D T = -40C 35 mA VJ gate non-trigger voltage V V = V T = 150C 0.2 V GD D DRM VJ gate non-trigger current I 1 mA GD latching current t = 10 s T = 25C 30 mA I VJ L p I = 0.07A di /dt = 0.5 A/s G G holding current I V = 6 V R = T = 25C 25 mA H D GK VJ gate controlled delay time t V = V T = 25C 2 s VJ gd D DRM I = 0.07A di /dt = 0.5 A/s G G turn-off time V = 0 V I = 20 A V = V T =125 C 150 s t q R T DRM VJ di/dt = 10 A/s dv/dt = 20 V/s t = 200 s p IXYS reserves the right to change limits, conditions and dimensions. Data according to IEC 60747and per semiconductor unless otherwise specified 20190212b 2019 IXYS all rights reserved