PT7C4512 PLL Clock Multiplier Features Description This Clock Multiplier is the most cost-effective way to Zero ppm multiplication error generate a high quality, high frequency clock outputs Input crystal frequency of 5 - 40 MHz from lower frequency crystal or clock input. It is Input clock frequency of 4 - 50 MHz designed to replace crystal oscillators in most electronic Output clock frequencies up to 200 MHz systems, clock multipliers and frequency translation Low period jitter 80ps (100~200MHz) devices with low output jitter. The device implements a Duty cycle of 45/55% of output clock up to 160MHz standard fundamental mode using PLL techniques and 9 selectable frequencies controlled by S0, S1 pins inexpensive crystal to produce output clocks up to 200 Operating voltages of 3.0 to 5.5V MHz. Lead free SOIC-8 package Pin Configuration The internal Logic divider is to generate nine different popular multiplication factors, allowing one chip to output many common frequencies. 1 X1/ICLK X2 8 2 7 Vcc S1 3 6 GND S0 4 REF CLK 5 SOIC-8 package Pin Description Clock Output Table Name Pin No. Type Description S1 S0 CLK 1) X1/ICLK 1 X1 Crystal connection or clock input. 0 0 4 2) 0 M (16/3) Vcc 2 P Connect to +3.3V or +5V. 0 1 5 GND 3 P Connect to ground. M 0 2.5 Buffered crystal oscillator output REF 4 O M M clock 2 Clock output per Clock Output M 1 (10/3) CLK 5 O Table. 1 0 6 Multiplier select pin 0, connect to 1 M 3 S0 6 T1 GND or Vcc or floating (no 1 1 8 connection). 1) Note: CLK output frequency=ICLK 4. Multiplier select pin 1, connect to 2) Note: M=Leave unconnected (self-biases to S1 7 T1 GND or Vcc or floating (no Vcc/2). connection). Crystal connection. Leave X2 8 XO unconnected for clock input. 2014-08-0003 PT0152-7 08/14/14 1 PT7C4511 PLL Clock Multiplier Block Diagram S0 PLL Clock Synthesis Output and CLK Buffer Control Circuit S1 X1/ICLK Crystal Output REF X2 Oscillator Buffer V GND CC External Components Decoupling Capacitor pads for small capacitors from X1 to ground and from As with any high-performance mixed-signal IC, the X2 to ground. These capacitors are used to adjust the PT7C4512 must be isolated from system power supply stray capacitance of the board to match the nominally noise to perform optimally. A decoupling capacitor of required crystal load capacitance. Because load 0.01F or 0.1uF must be connected between VCC and capacitance can only be increased in this trimming the GND. It must be connected close to the PT7C4512 process, it is important to keep stray capacitance to a to minimize lead inductance. No external power supply minimum by using very short PCB traces (and no vias) filtering is required for the PT7C4512. between the crystal and device. Crystal capacitors, if Series Termination Resistor needed, must be connected from each of the pins X1 A 33 terminating resistor can be used next to the and X2 to ground. The value (in pF) of these crystal CLK pin for trace lengths over one inch. caps should equal C *2. In this equation, C = crystal L L load capacitance in pF. Example: For a crystal with a 15 Crystal Load Capacitors There is no on-chip capacitance build-in chip. A pF load capacitance, each crystal capacitor would be parallel resonant, fundamental mode crystal should be 30pF. used. The device crystal connections should include Maximum Ratings Note: Stresses greater than those listed under MAXIMUM o o Storage Temperature ..................................................................................... - 65 C to +150 C RATINGS may cause permanent damage to the o o device. This is a stress rating only and functional Ambient Operating Temperature ................................................................... -40 C to +85 C operation of the device at these or any other condi- Supply Voltage to Ground Potential (V ) ................................................... - 0.3V to +7.0V CC tions above those indicated in the operational sec- Inputs(Referenced to GND) ............................................. -0.5V to V +0.5V CC tions of this specification is not implied. Exposure to Clock Output(Referenced to GND) ................................ -0.5V to V +0.5V CC absolute maximum rating conditions for extended o Soldering Temperature(Max of 10 seconds).................... 260 C (Max. 10s) periods may affect reliability. Recommended Operating Conditions Sym Parameter Conditions Min Typ Max Unit V Supply voltage - 3.0 - 5.5 V CC T Operating temperature - -40 - +85 C A 2014-08-0003 PT0152-7 08/14/14 2