www.fastertechnology.com FM-PLPC Prototype Development Platform Development platform for FPGA Mezzanine Card Low Pin count functions Features Industry standard, modular FPGA I/O in an FPGA Mez- zanine Card (FMC, aka VITA 57), module FMC Compliant (when cut as marked) with standard mounting holes and connector Breakout of Low Pin count Connector (LPC) pins to 0.1 development matrix Standard FMC outline or extended length option Extended Ground rails and Power breakout for two power connections Control signals available for user connections in devel- opment matrix On board EEPROM footprint for configuration manage- ment and user data Benefits Description The FM-PLPC breaks out the complete LA bank of sig- Provides rapid means to develop new FMC functions nals from the standard FMC Low Pin count Connector Extended length version enables development of more and the standard power rail and control signals. The user complex FMC systems for later integration to standard can add standard 0.1 inch spaced components and sock- FMC form factor ets for a wide variety of active and passive devices. The Footprint for on board EEPROM simplifies complete extended length version offers almost four times the pro- FMC compatible interface totype area of the standard length version to enable de- Breakout of High Speed serial interfaces, clocks and velopment of very complex capabilities. Standard control signals are available for the user to complete the inter- control signals enables easy completion of full capabil- ity FMC functions face to the chosen carrier card. Faster Technology LLC 1812 Avenue D, Suite 202 Katy, TX 77493 T: 281.391.5482 F: 281.391.9384 info fastertechnology.com www.fastertechnology.com FM-PLPC Prototype Development Platform FM-PLPC Technical Specifications LPC Connections LA00 through LA33 P and N to development matrix connections High Speed serial lines DP0 M2C and DP0 C2M breakout adjacent to LPC connector Development Matrix Standard 0.1 inch hole matrix Optional customer cut to standard length FMC 20 X 16 hole matrix Extended length option 20 X 66 hole matrix Reference Clocks GBTCLK0 M2C Breakout adjacent to LPC connector CLK0 M2C and CLK1 M2C Breakout adjacent to LPC connector Power connections Power lines in development matrix Two rows in development matrixuser connection to power Two GND rows in development matrix JTAG Standard signals available in development matrix TDI tied to TDO with user removable link Supported Host boards Virtex-6 Xilinx EK-V6-ML605-G Kintex-7 Xilinx EK-K7-KC705 On-board serial EEPROM footprint 2 EEPROM interface I C via FMC SCL / SDA interface 2 I C address via FMC GA0 / GA1 Write Protect from footprint to development matrix Miscellaneous FMC compliance ANSI/VITA 57.1 (February 2010) compliant when cut as marked V User determined ADJ Power Good - PG C2M Available to user in development matrix Module Present - PRESENT M2C Grounded with user removable link and available in development matrix Related Products Ordering Information FM-PLPC-E Extended length FMC development plat- FM-S14 FMC compliant module with one quad form SFP/SFP+ cage supporting up to four (4) SFP or SFP+ Modules FM-S18 FMC compatible module with two quad SFP/SFP+ cages to support up to eight (8) SFP or SFP+ Modules FM-S28 FMC compatible module with two QSFP/ QSFP+ cages to support up to two (2) QSFP or QSFP+ Modules Faster Technology LLC 1812 Avenue D, Suite 202 Katy, TX 77493 T: 281.391.5482 F: 281.391.9384 info fastertechnology.com