PA84, PA84A, PA84S PA84 PPA84 PA84AA84A P PA84SA84S Power Operational Amplifiers FEATURES HIGH SLEW RATE 200V/s FAST SETTLING TIME .1% in 1s (PA84S) FULLY PROTECTED INPUT Up to 150v LOW BIAS CURRENT, LOW NOISE FET Input WIDE SUPPLY RANGE 15V to 150V 8-PIN TO-3 APPLICATIONS PACKAGE STYLE CE HIGH VOLTAGE INSTRUMENTATION 100K 50K ELECTROSTATIC TRANSDUCERS & DEFLECTION PROGRAMMABLE POWER SUPPLIES UP TO 290V +150V 4.7K ANALOG SIMULATORS 390pF 10V DESCRIPTION DAC The PA84 is a high voltage operational amplifier designed 10K PA84 for output voltage swings up to 145V with a dual supply or 290V with a single supply. Two versions are available. The INK JET new PA84S, fast settling amplifier can absorb differential input CONTROL overvoltages up to 50V while the established PA84 and PA84A can handle differential input overvoltages of up to 300V. Both 150V versions are protected against common mode transients and overvoltages up to the supply rails. High accuracy is achieved TYPICAL APPLICATION with a cascode input circuit configuration. All internal biasing The PA84 is ideally suited to driving ink jet control units (often is referenced to a zener diode fed by a FET constant current a piezo electric device) which require precise pulse shape source. As a result, the PA84 features an unprecedented sup- control to deposit crisp clear date or lot code information on ply range and excellent supply rejection. The output stage is product containers. The external compensation network has biased-on for linear operation. External phase compensation been optimized to match the gain setting of the circuit and the allows for user flexibility in obtaining the maximum slew rate. complex impedance of the ink jet control unit. The combination Fixed current limits protect these amplifiers against shorts of speed and high voltage capabilities of the PA84 form ink to common at supply voltages up to 150V. For operation into droplets of uniform volume at high production rates to enhance inductive loads, two external flyback pulse protection diodes the value of the printer. are recommended. However, a heatsink may be necessary to EQUIVALENT SCHEMATIC maintain the proper case temperature under normal operating conditions. 4 This hybrid integrated circuit utilizes a beryllia (BeO) sub- 2 C1 strate, thick film resistors, ceramic capacitors and semiconduc - D1 tor chips to maximize reliability, minimize size and give top 3 Q3 performance. Ultrasonically bonded aluminum wires provide Q1 Q2 reliable interconnections at all operating temperatures. The Q4 8-pin TO-3 package is hermetically sealed and electrically Q5 isolated. The use of compressible thermal isolation washers Q6 8 and/or improper mounting torque will void the product warranty. Q8 Q9 Q7 Please see General Operating Considerations. Q10 C5 Q11 * C4 Q12B EXTERNAL CONNECTION 1 Q12A 5 -V * S PHASE COMPENSATION Q13 +IN * 7 COMP 6 GAIN C R Q14 Q17 C C * Q16 8 * 1 10nF 200 6 R Q15 C IN 5 10 500pF 2K 100 50pF 20K TOP VIEW C6 D2 * 1000 none none 7 C 4 C NOTES: BAL 1 1. Phase Compensation required *Not included in PA84S. 3 for safe operation. OUT 2 2. Input offset trimpot optional. BAL +V S Recommended value 100K. Copyright Apex Microtechnology, Inc. 2014 OCT 2015 PwwwA84U .apexanalog.com 1 (All Rights Reserved) PA84U REVVPA84 PA84A PA84S SUPPLY VOLTAGE, +V to V 300V ABSOLUTE MAXIMUM RATINGS S S OUTPUT CURRENT, within SOA Internally Limited 2 POWER DISSIPATION, internal at T = 25C 17.5W C 1 INPUT VOLTAGE, differential PA84/PA84A 300V INPUT VOLTAGE, differential PA84S 50V 1 INPUT VOLTAGE, common mode V S TEMPERATURE, pins for 10s max (solder) 350C 2 TEMPERATURE, junction 175C TEMPERATURE RANGE, storage 65 to +150C OPERATING TEMPERATURE RANGE, case 55 to +125C SPECIFICATIONS PA84/PA84S PA84A 3 PARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNITS INPUT OFFSET VOLTAGE, initial T = 25C 1.5 3 .5 1 mV C OFFSET VOLTAGE, vs. temperature T = 25 to +85C 10 25 5 10 V/C C OFFSET VOLTAGE, vs. supply T = 25C .5 .2 V/V C OFFSET VOLTAGE, vs. time T = 25C 75 * V/kh C 4 BIAS CURRENT, initial T = 25C 5 50 3 10 pA C BIAS CURRENT, vs. supply T = 25C .01 * pA/V C 4 OFFSET CURRENT, initial T = 25C 2.5 50 1.5 10 pA C OFFSET CURRENT, vs. supply T = 25C .01 * pA/V C 11 INPUT IMPEDANCE, DC T = 25C 10 * C INPUT CAPACITANCE T = 25 to +85C 6 * pF C 5 COMMON MODE VOLTAGE RANGE T = 25 to +85C V 10 V8.5 * * V C S S COMMON MODE REJECTION, DC T = 25 to +85C 130 * dB C GAIN OPEN LOOP GAIN at 10Hz T = 25C, R = 120 * dB C L OPEN LOOP GAIN at 10Hz. T = 25C, R = 3.5K 100 118 * * dB C L GAIN BANDWIDTH PRODUCT 1MHz T = 25C, R = 3.5K, R = 20K 75 * MHz C L C POWER BANDWIDTH, high gain T = 25C, R = 3.5K, R = 20K 250 180 * kHz C L C POWER BANDWIDTH, low gain T = 25C, R = 3.5K, R = 20K 120 * kHz C L C OUTPUT 5 VOLTAGE SWING T = 25C, I = 40mA V7 V3 * * V C O S S 5 VOLTAGE SWING T = 25 to +85C, I = 15mA V5 V2 * * V C O S S CURRENT, peak T = 25C 40 * mA C CURRENT, short circuit T = 25C 50 * mA C SLEW RATE, high gain T = 25C, R = 3.5K, R = 20K 200 150 * V/s C L C SLEW RATE, low gain T = 25C, R = 3.5K, R = 2K 125 * V/s C L C SETTLING TIME .01% at gain = 100 T = 25C, R = 3.5K PA84S 2 s C L SETTLING TIME .1% at gain = 100 R = 20K, V = 2V step ONLY 1 s C IN SETTLING TIME .01% at gain = 100 T = 25C, R = 3.5K PA84/84A 20 20 s C L SETTLING TIME .1% at gain = 100 R = 20K, V = 2V step 12 12 s C IN POWER SUPPLY VOLTAGE T = 55C to +125C 15 150 * * V C CURRENT, quiescent T = 25C 5.5 7.5 * * mA C THERMAL 6 RESISTANCE, AC, junction to case T = 55C to +125C, F > 60Hz 4.26 * C/W C RESISTANCE, DC, junction to case T = 55C to +125C, F < 60Hz 6.22 8.57 * * C/W C RESISTANCE, case to air T = 55C to +125C 30 * C/W C TEMPERATURE RANGE, case Meets full range specifications 25 +85 * * C NOTES: * The specification of PA84A is identical to the specification for PA84/PA84S in applicable column to the left. 1. Signal slew rates at pins 5 and 6 must be limited to less than 1V/ns to avoid damage. When faster waveforms are unavoidable, resistors in series with those pins, limiting current to 150mA will protect the amplifier from damage. 2. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF. 3. The power supply voltage for all tests is 150V, unless otherwise noted as a test condition. 4. Doubles for every 10C of temperature increase. 5. +V and V denote the positive and negative power supply rail respectively. S S 6. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or CAUTION subject to temperatures in excess of 850C to avoid generating toxic fumes. 2 PA84U