EVALUATION KIT AVAILABLE MAX11192/MAX11195/ 12-/14-/16-Bit, 2Msps, Dual Simultaneous MAX11198 Sampling SAR ADCs with Internal Reference General Description Benefits and Features The MAX11192/MAX11195/MAX11198 is a dual-channel T iny 16-Pin, 3mm x 2mm, TDFN Package SAR ADCs with simultaneous sampling at 2Msps, 12-/14- Up to 2Msps Throughput Rate /16-bit resolution, and differential inputs. Available in a Two Simultaneous-Sampling ADC Cores tiny 16-pin, 3mm x 2mm ultra TDFN package, this ADC delivers excellent static and dynamic performance while 2.5V Integrated Reference and Reference Buffers operating from a supply voltage over the range of 3.0V to Two Data Outputs for the Two Simultaneous- 5.25V. An integrated reference further reduces board area Sampling ADCs and component count. No Overhead Clock Cycles 12/14/16 Clock Cycles The MAX11192/MAX11195/MAX11198 output conversion for 12-/14-/16-Bit Result data using an SPI-compatible serial interface with a dual Balanced, Differential Input Range of V REF DOUT bus. Specifications apply over the extended industrial temperature range of -40C to +125C. Applications Ordering Information appears at end of data sheet. Encoders Resolvers LVDT Current Sensing in Motors PLC Application Diagram 3.3V TO 5.25V 1.8V TO 3.6V MAX11192 10 F 10 F MAX11195 MAX11198 AVDD OVDD AGND OGND 7.5 V REF - AIN1+ 0.5 x V REF + 1nF 0V SAR ADC DOUT1 7.5 C0G V AIN1- REF - DUAL 0.5 x VREF + CNVST 0V SPI INTERFACE 7.5 SCLK V REF - AIN2+ 0.5 x V REF + 1nF DOUT2 SAR ADC 0V 7.5 C0G V AIN2- REF - 0.5 x V REF + 0V REFIN/OUT REF1 REF2 REFGND 1 F 1 F 1 F 19-100018 Rev 1 9/17MAX11192/MAX11195/ 12-/14-/16-Bit, 2Msps, Dual Simultaneous MAX11198 Sampling SAR ADCs with Internal Reference Absolute Maximum Ratings AVDD to GND, REFGND, OGND ........................-0.3V to +5.5V Maximum Current Into Any Pin ........................ -50mA to +50mA OVDD to GND, REFGND, OGND ........................-0.3V to +5.5V Continuous Power Dissipation (16 TDFN T = +70C A AINn+, AINn- to GND, REFGND, OGND .. -0.3V to The lower of derate 16.7mW/C above +70C) ( ) .........................1333mW (V + 0.3V) and +5.5V Operating Temperature Range ............................-40C to 125C AVDD REFIN, REF1, REF2 to GND, REFGND, OGND ............-0.3V to Junction Temperature ......................................................+150C The lower of (V + 0.3V) and +5.5V Storage Temperature Range ............................ -65C to +150C AVDD CNVST, SCLK, DOUT1, DOUT2 to OGND .....................-0.3V to Lead Temperature (soldering, 10s) .................................+300C The lower of (V + 0.3V) and +5.5V Soldering Temperature (reflow) .......................................+260C OVDD GND to REFGND to OGND .................................-0.3V to +0.3V Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Information 16 TDFN PACKAGE CODE T1623CN+1 Outline Number 21-100030 Land Pattern Number Thermal Resistance, Four-Layer Board: Junction to Ambient ( ) 60 JA Junction to Case ( ) 11 JC For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a +, , or - in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Electrical CharacteristicsMAX11192 (f = 2MSPS V = 5.0V, V = 1.8V V = 2.5V (Internal Reference) T = T to T (Note 1). Typical values Sample AVDD OVDD REFIN/OUT A MIN MAX are at T = +25C, unless otherwise noted.) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ANALOG INPUTS Input Voltage Range V AINn+ AINn- V V IN(DIFF) REF V AVDD Absolute Input Voltage Range V AINn+/AINn- relative to GND -0.1 V IN(RNG) + 0.1 Common-Mode Input Voltage V /2 V /2 REF REF CMI (AINn+ + AINn-)/2 V RNG Range - 0.1 + 0.1 Input Leakage Current I Acquisition phase 1 A IN LEAK Input Capacitance C 10 pF IN Maxim Integrated 2 www.maximintegrated.com