Circuit Note CN-0253 Devices Connected/Referenced ADG5408/ High Voltage Latch-Up Proof, Circuits from the Lab reference circuits are engineered and ADG5409 4-/8-Channel Multiplexers tested for quick and easy system integration to help solve todays analog, mixed-signal, and RF design challenges. For more AD8226 Wide Supply Range, Rail-to-Rail information and/or support, visit www.analog.com/CN0253. Output Instrumentation Amplifier A Robust, Low Power, Battery Monitoring Circuit Front End The two multiplexers and the instrumentation amplifier (IA) EVALUATION AND DESIGN SUPPORT used in this design have robust inputs. The ADG5408 is a high Circuit Evaluation Boards voltage 8:1 multiplexer that is latch-up proof. The trench isolation CN-0253 Circuit Evaluation Board (EVAL-CN0253-SDPZ) technology used in the fabrication of the ADG5408 prevents System Demonstration Platform (EVAL-SDP-CS1Z) the latch-up state and reduces the need for external protection Design and Integration Files circuitry. Latch-up proof does not guarantee overvoltage protection Schematics, Layout Files, Bill of Materials and only means the switch does enter the high current SCR mode. CIRCUIT FUNCTION AND BENEFITS The ADG5408 also has an electrostatic discharge (ESD) rating of 8 kV human body model (ANSI/ESDA/JEDEC JS-001-2010). The circuit shown in Figure 1 is a robust battery monitoring front end designed for environments where transients are likely to The AD8226 is a low cost, low power, instrumentation amplifier occur, such as in industrial or process automation environments. with robust inputs and can handle input voltages up to 40 V from The circuit uses the ADG5408 8-channel CMOS multiplexer the opposite supply rail, while restricting the output to within followed by the AD8226 instrumentation amplifier to provide the rails. For instance, with 18 V supplies, the positive or negative accurate voltage monitoring of individual cells at low power and input of the AD8226 can swing between 22 V with no damage. low cost, and requires no additional external transient protection All inputs of the AD8226 are protected against ESD with internal circuitry. diodes. Transient overvoltage conditions may cause traditional CMOS CIRCUIT DESCRIPTION switches to experience latch up. In junction isolation technology, Battery monitoring systems (BMS) require the individual voltage the N- and P-wells of the PMOS and NMOS transistors form a across each battery in a battery stack to assess the state of charge parasitic silicon-controlled rectifier (SCR) circuit. An overvoltage (SOC) and state of health (SOH) of the battery. By multiplexing condition triggers this SCR, causing a significant amplification of the terminals of a stack of batteries with two multiplexers, as shown current that, in turn, leads to latch-up. Latch-up is an undesirable, in Figure 1, the voltage across each battery can be assessed. high current state that can lead to device failure and can persist One multiplexer is used for the positive terminal and another until the power supply is turned off. for the negative terminal. This differential multiplexing allows Latch-up can occur if either the input or the output pin voltage the use of a single instrumentation amplifier for up to eight exceeds the supply rail by more than a diode drop, or by improper channels. The amplifier then removes the common-mode power supply sequencing. If a fault occurs on the channel, and voltage from each of the batteries for use by the BMS. the signal exceeds the maximum rating, the fault can trigger the The ADG5408 has a low on-resistance per channel, typically latch-up state in an typical CMOS part. 13.5 , and a maximum of 22 over temperature . With a During circuit power up, it is also possible for voltages to occur maximum of 2 nA input offset current, there is a maximum on inputs before power is applied to the CMOS switch, especially if of 44 nV error voltage across the channel resistances. multiple supplies are used to power the circuit. This condition may exceed the maximum rating of the device and trigger a latch-up state. Rev. A Circuits from the Lab circuits from Analog Devices have been designed and built by Analog Devices engineers. Standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. However, you are solely responsible for testing the circuit and determining its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices Tel: 781.329.4700 www.analog.com be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page) Fax: 781.461.3113 2012 Analog Devices, Inc. All rights reserved. CN-0253 Circuit Note +18V 18V V GND V DD SS ADG5408 S1 BAT 1 S2 BAT 2 S3 BAT 3 S4 D BAT 4 S5 BAT 5 S6 BAT 6 S7 BAT 7 S8 BAT 8 1-OF-8 +18V 18V DECODER A0 A1 A2 EN +V V S S R G AD8226 +IN V V OUT OUT 18V +18V IN V GND V DD SS ADG5408 R G REF S1 S2 S3 S4 D S5 S6 S7 S8 1-OF-8 DECODER A0 A1 A2 EN TO SDP BOARD Figure 1. Robust Battery Monitoring Circuit Simplified Schematic (All Connections and Decoupling Not Shown) Rev. A Page 2 of 4 10374-001