QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1351B SINGLE OUTPUT, HIGH POWER, HIGH EFFICIENCY POE LTC4269IDKD-2 DESCRIPTION Demonstration circuit 1351B is a high-power power, small-sized power supply that utilizes a highly-efficient isolated forward topology with supply featuring the LTC 4269IDKD-2. This synchronous rectification. The DC1351B sup- board acts as an IEEE 802.3at compliant, high plies a 5V output at up to 5A. power Power-over-Ethernet (PoE), Powered Device (PD) and connects at the RJ45 to a DC1351B also demonstrates the use of an compatible high power Power Sourcing auxiliary 48V wall adapter. When present, the Equipment (PSE) device, such as the auxiliary supply becomes the dominant supply DC1366A. over PoE to provide power. The LTC4269IDKD-2 provides IEEE802.3at Design files for this circuit board are avail- standard (PoE+) PD interfacing and power able. Call the LTC factory. supply control. When the PD is fully powered, the PD interface switches power over from the , LTC and LT are registered trademarks of Linear Technology Cor- poration. PSE to the switcher through an internal, low resistance, high power MOSFET. The highly integrated LTC4269IDKD-2 controls a high- Table 1. Performance Summary (T = 25C) A PARAMETER CONDITION VALUE Port Voltage (V ) At Ethernet port 37V 57V PORT Auxiliary Voltage (V ) From Aux- to Aux+ terminals 44V 57V AUX Output Voltage (V ) Initial Set-point V = 37V to 57V, I = 0A to 5A 5.05V 1% OUT PORT OUT Maximum Output Current V = 42V 4.6A (min) PORT Typical Output Voltage Ripple V = 50V, I = 4.6A 40mV (typ) IN OUT PP Output Regulation Over Entire Input Voltage and Output Current Range < 0.1% (typ) Peak to Peak Deviation with Load Step of 2.5A to 5A 120mV (< 2.5%) (typ) Load Transient Response Settling Time (within 1% of V) 150us (typ) OUT Switching Frequency 225kHz (typ) Efficiency V = 42V, I = 5A, not incl. diode bridge 92.5% (typ) PORT OUT OPERATING PRINCIPLES A compatible high power PSE board, such as diodes (D5-8, D12-15) are used at the input to the DC1366A, is connected to the DC1351B at improve efficiency over standard diode bridges. the RJ45 connector J2 (see the schematic). As The LTC4269IDKD-2 provides an IEEE802.3at required by IEEE802.3at, a diode bridge is used standard PoE 25k signature resistance and is across the data pairs and signal pairs. Schottky set for a power class 4. When the PD is pow- 1 QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1351B SINGLE OUTPUT, HIGH POWER, HIGH EFFICIENCY POE ered and voltage is above the PoE On Volt- optoisolator (U2) and the reference/error ampli- age, the LTC4269IDKD-2 switches the port fier (D21) pulling down on the COMP pin. The voltage over to the power supply controller OUT and SOUT pins which drive Q3 and Q2, through its internal MOSFET which lies be- respectively, are Pulse Width Modulated (PWM) tween the V and V pins. This voltage in order to keep the output voltage constant. PORTN NEG charges C11 through a trickle charge resistor, The synchronous rectifiers (Q4 and Q5) on the R3 to power the bias pin, Vin, of the power sup- secondary side are self-driven by T2. This re- ply controller. Once the bias power gets to its duces the gate drive parts count and complex- V threshold, the IC begins a controlled ity since no external driver ICs or delay circuits IN(ON) soft-start of the output. As this voltage rises, are needed to achieve synchronous rectifica- bias power is taken over by T2, D1/2, and L1. tion. The high efficiency that is expected with synchronous rectification is maintained. When the soft-start period is over, the output voltage is regulated by the combination of the QUICK START PROCEDURE Demonstration circuit 1351B is easy to set up to a. Connect a PoE+ capable PSE with a CAT-5 evaluate the performance of the LTC4269IDKD- cable to the RJ45 connector, J2. See Figure 2 in a PoE+ PD application. Refer to Figure 1 1. for proper equipment setup and follow the pro- b. Or, connect a 37V to 57V capable power cedure below: supply (Power Supply in Figure 1) across VPORT P and VPORT N. NOTE: When measuring the input or output volt- c. If evaluating the auxiliary power supply age ripple, care must be taken to avoid a long (Auxiliary Supply in Figure 1) capability, ground lead on the oscilloscope probe. Meas- connect a 44V to 57V capable power supply ure the output (or input) voltage ripple by touch- across AUX+ to AUX-. ing the probe tip and probe ground directly 3. Check for the proper output voltage of 5V. across the +VOUT and VOUT (or VPORT P and VPORT N) terminals. See Figure 2 for 4. Once the proper output voltage is confirmed, proper scope probe technique. adjust the load within the operating range and observe the output voltage regulation, ripple 1. Place test equipment (voltmeter, ammeter, voltage, efficiency and other parameters. and electronic load) across output. 2. Input supplies: 2