5-Channel Integrated Power Solution with Quad Buck Regulators and 200 mA LDO Regulator Data Sheet ADP5050 FEATURES TYPICAL APPLICATION CIRCUIT ADP5050 Wide input voltage range: 4.5 V to 15 V SYNC/MODE VREG INT VREG 1.5% output accuracy over full temperature range VDD OSCILLATOR RT C1 100mA C0 250 kHz to 1.4 MHz adjustable switching frequency FB1 PVIN1 2 4.5V TO 15V BST1 Adjustable/fixed output options via factory fuse or I C interface SW1 C3 CHANNEL 1 2 L1 VOUT1 C2 I C interface with interrupt on fault conditions BUCK REGULATOR COMP1 (1.2A/2.5A/4A) VREG C4 Power regulation EN1 Q1 DL1 Channel 1 and Channel 2: programmable 1.2 A/2.5 A/4 A SS12 R ILIM1 PGND sync buck regulators with low-side FET driver R ILIM2 DL2 Channel 3 and Channel 4: 1.2 A sync buck regulators Q2 PVIN2 C5 VREG CHANNEL 2 VOUT2 SW2 Channel 5: 200 mA low dropout (LDO) regulator BUCK REGULATOR COMP2 L2 (1.2A/2.5A/4A) C6 C7 BST2 Single 8 A output (Channel 1 and Channel 2 operated in parallel) EN2 FB2 Dynamic voltage scaling (DVS) for Channel 1 and Channel 4 PVIN3 BST3 Precision enable with 0.8 V accurate threshold C9 C8 L3 VOUT3 SW3 Active output discharge switch COMP3 CHANNEL 3 BUCK REGULATOR C10 FB3 (1.2A) Programmable phase shift in 90 steps EN3 PGND3 Individual channel FPWM/PSM mode selection SS34 BST4 Frequency synchronization input or output PVIN4 C12 L4 VOUT4 SW4 Optional latch-off protection on OVP/OCP failure CHANNEL 4 C11 BUCK REGULATOR COMP4 C13 FB4 (1.2A) Power-good flag on selected channels EN4 PGND4 Low input voltage detection 1.7V TO 5.5V VOUT5 VOUT5 PVIN5 CHANNEL 5 Overheat detection on junction temperature 200mA LDO EN5 C15 FB5 C14 REGULATOR UVLO, OCP, and TSD protection VDDIO PWRGD 48-lead, 7 mm 7 mm LFCSP package 2 I C ALERT SCL INT SDA 40C to +125C junction temperature EXPOSED PAD APPLICATIONS Figure 1. Small cell base stations FPGA and processor applications Table 1. Family Models 2 Security and surveillance Model Channels IC Package Medical applications ADP5050 Four bucks, one LDO Yes 48-Lead LFCSP ADP5051 Four bucks, supervisory Yes 48-Lead LFCSP GENERAL DESCRIPTION ADP5052 Four bucks, one LDO No 48-Lead LFCSP The ADP5050 combines four high performance buck regulators ADP5053 Four bucks, supervisory No 48-Lead LFCSP and one 200 mA low dropout (LDO) regulator in a 48-lead LFCSP ADP5054 Four high current bucks No 48-Lead LFCSP package that meets demanding performance and board space The switching frequency of the ADP5050 can be programmed requirements. The device enables direct connection to high input or synchronized to an external clock. The ADP5050 contains a voltages up to 15 V with no preregulators. precision enable pin on each channel for easy power-up sequencing Channel 1 and Channel 2 integrate high-side power MOSFETs and or adjustable UVLO threshold. low-side MOSFET drivers. External NFETs can be used in low-side The ADP5050 integrates a general-purpose LDO regulator with power devices to achieve an efficiency optimized solution and low quiescent current and low dropout voltage that provides up deliver a programmable output current of 1.2 A, 2.5 A, or 4 A. to 200 mA of output current. Combining Channel 1 and Channel 2 in a parallel configuration 2 can provide a single output with up to 8 A of current. The optional I C interface provides the user with flexible configuration options, including adjustable and fixed output Channel 3 and Channel 4 integrate both high-side and low-side voltage options, junction temperature overheat warning, low MOSFETs to deliver output current of 1.2 A. input voltage detection, and dynamic voltage scaling (DVS). Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20132016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 10899-001ADP5050 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 LDO Regulator ........................................................................... 26 2 Applications ....................................................................................... 1 I C Interface .................................................................................... 27 General Description ......................................................................... 1 SDA and SCL Pins ...................................................................... 27 2 Typical Application Circuit ............................................................. 1 I C Addresses .............................................................................. 27 Revision History ............................................................................... 3 Self-Clear Register Bits .............................................................. 27 2 Detailed Functional Block Diagram .............................................. 4 I C Interface Timing Diagrams ................................................ 28 Specifications ..................................................................................... 5 Applications Information .............................................................. 29 Buck Regulator Specifications .................................................... 6 ADIsimPower Design Tool ....................................................... 29 LDO Regulator Specifications .................................................... 8 Programming the Adjustable Output Voltage ........................ 29 2 I C Interface Timing Specifications ........................................... 9 Voltage Conversion Limitations ............................................... 29 Absolute Maximum Ratings .......................................................... 10 Current-Limit Setting ................................................................ 29 Thermal Resistance .................................................................... 10 Soft Start Setting ......................................................................... 30 ESD Caution ................................................................................ 10 Inductor Selection ...................................................................... 30 Pin Configuration and Function Descriptions ........................... 11 Output Capacitor Selection....................................................... 30 Typical Performance Characteristics ........................................... 13 Input Capacitor Selection .......................................................... 31 Theory of Operation ...................................................................... 19 Low-Side Power Device Selection ............................................ 31 Buck Regulator Operational Modes ......................................... 19 Programming the UVLO Input ................................................ 31 Adjustable and Fixed Output Voltages .................................... 20 Compensation Components Design ....................................... 32 Dynamic Voltage Scaling (DVS) .............................................. 20 Power Dissipation....................................................................... 32 Internal Regulators (VREG and VDD) ................................... 20 Junction Temperature ................................................................ 33 Separate Supply Applications .................................................... 20 Design Example .............................................................................. 34 Low-Side Device Selection ........................................................ 21 Setting the Switching Frequency .............................................. 34 Bootstrap Circuitry .................................................................... 21 Setting the Output Voltage ........................................................ 34 Active Output Discharge Switch .............................................. 21 Setting the Current Limit .......................................................... 34 Precision Enabling ...................................................................... 21 Selecting the Inductor ................................................................ 34 Oscillator ..................................................................................... 21 Selecting the Output Capacitor ................................................ 35 Synchronization Input/Output ................................................. 22 Selecting the Low-Side MOSFET ............................................. 35 Soft Start ...................................................................................... 23 Designing the Compensation Network ................................... 35 Parallel Operation....................................................................... 23 Selecting the Soft Start Time..................................................... 35 Startup with Precharged Output .............................................. 23 Selecting the Input Capacitor ................................................... 35 Current-Limit Protection .......................................................... 24 Recommended External Components .................................... 36 Frequency Foldback ................................................................... 24 Circuit Board Layout Recommendations ................................... 37 Hiccup Protection ...................................................................... 24 Typical Application Circuits ......................................................... 38 Latch-Off Protection .................................................................. 24 Register Map ................................................................................... 41 Undervoltage Lockout (UVLO) ............................................... 25 Detailed Register Descriptions ..................................................... 42 Power-Good Function ............................................................... 25 Register 1: PCTRL (Channel Enable Control), Address 0x01 42 Interrupt Function ...................................................................... 25 Register 2: VID1 (VID Setting for Channel 1), Address 0x02 ....................................................................................................... 42 Thermal Shutdown ..................................................................... 26 Register 3: VID23 (VID Setting for Channel 2 and Channel 3), Overheat Detection .................................................................... 26 Address 0x03 ............................................................................... 43 Low Input Voltage Detection .................................................... 26 Rev. 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