110 MSPS/140 MSPS Analog Interface for Flat Panel Displays AD9985 FUNCTIONAL BLOCK DIAGRAM FEATURES AUTO CLAMP Automated clamping level adjustment LEVEL ADJUST 140 MSPS maximum conversion rate 8 300 MHz analog bandwidth R A/D R AIN CLAMP OUTA 0.5 V to 1.0 V analog input range 500 ps p-p PLL clock jitter at 110 MSPS AUTO CLAMP LEVEL ADJUST 3.3 V power supply 8 Full sync processing G CLAMP A/D AIN G OUTA Sync detect for hot plugging Midscale clamping AUTO CLAMP LEVEL ADJUST Power-down mode Low power: 500 mW typical 8 B CLAMP A/D B AIN OUTA 4:2:2 output format mode MIDSCV HSYNC APPLICATIONS COAST DTACK SYNC RGB graphics processing PROCESSING HSOUT CLAMP AND CLOCK LCD monitors and projectors VSOUT FILT GENERATION SOGOUT Plasma display panels SOGIN Scan converters REF REF BYPASS SCL Microdisplays SERIAL REGISTER AND SDA POWER MANAGEMENT Digital TV AD9985 A0 Figure 1. GENERAL DESCRIPTION The AD9985 is a complete 8-bit, 140 MSPS, monolithic analog to 140 MHz. PLL clock jitter is 500 ps p-p typical at 140 MSPS. interface optimized for capturing RGB graphics signals from When the COAST signal is presented, the PLL maintains its personal computers and workstations. Its 140 MSPS encode rate output frequency in the absence of Hsync. A sampling phase adjustment is provided. Data, Hsync, and clock output phase capability and full power analog bandwidth of 300 MHz relationships are maintained. The AD9985 also offers full sync support resolutions up to SXGA (1280 1024 at 75 Hz). processing for composite sync and sync-on-green applications. The AD9985 includes a 140 MHz triple ADC with internal A clamp signal is generated internally or may be provided by 1.25 V reference, a PLL, and programmable gain, offset, and clamp control. The user provides only a 3.3 V power supply, the user through the CLAMP input pin. This interface is fully analog input, and Hsync and COAST signals. Three-state programmable via a 2-wire serial interface. CMOS outputs may be powered from 2.5 V to 3.3 V. Fabricated in an advanced CMOS process, the AD9985 is The AD9985s on-chip PLL generates a pixel clock from the provided in a space-saving 80-lead LQFP surface-mount Hsync input. Pixel clock output frequencies range from 12 MHz plastic package and is specified over the 40C to +85C temperature range. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Specifications subject to change without notice. No license is granted by implication Tel: 781.329.4700 www.analog.com or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Fax: 781.326.8703 2004 Analog Devices, Inc. All rights reserved. 04799-0-001AD9985* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS DESIGN RESOURCES View a parametric search of comparable parts. AD9985 Material Declaration PCN-PDN Information DOCUMENTATION Quality And Reliability Application Notes Symbols and Footprints AN-745: Implementing the Auto-Offset Function on the AD9985 DISCUSSIONS Data Sheet View all AD9985 EngineerZone Discussions. AD9985: 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays Data Sheet SAMPLE AND BUY Visit the product page to see pricing options. SOFTWARE AND SYSTEMS REQUIREMENTS AD988x Evaluation Tools Software Program TECHNICAL SUPPORT Submit a technical question or find your regional support REFERENCE MATERIALS number. Informational Advantiv Advanced TV Solutions DOCUMENT FEEDBACK Technical Articles Submit feedback for this data sheet. Analysis of Common Failures of HDMI CT This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.