14-Bit, 20 MSPS/40 MSPS/65 MSPS Dual A/D Converter AD9248 FUNCTIONAL BLOCK DIAGRAM FEATURES AVDD AGND Integrated dual 14-bit ADC Single 3 V supply operation (2.7 V to 3.6 V) OTR A VIN+ A 14 14 SNR = 71.6 dB (to Nyquist, AD9248-65) D13 A TO D0 A SHA ADC OUTPUT VIN A MUX/ OEB A SFDR = 80.5 dBc (to Nyquist, AD9248-65) BUFFERS Low power: 300 mW/channel at 65 MSPS REFT A MUX SELECT Differential input with 500 MHz, 3 dB bandwidth CLK A REFB A CLOCK Exceptional crosstalk immunity > 85 dB CLK B DUTY CYCLE VREF Flexible analog input: 1 V p-p to 2 V p-p range STABILIZER DCS SENSE Offset binary or twos complement data format SHARED REF AGND 0.5V Clock duty cycle stabilizer PWDN A MODE PWDN B Output datamux option CONTROL DFS REFT B REFB B APPLICATIONS OTR B VIN+ B 14 14 SHA OUTPUT ADC Ultrasound equipment D13 B TO D0 B VIN B MUX/ BUFFERS Direct conversion or IF sampling receivers OEB B AD9248 WB-CDMA, CDMA2000, WiMAX Battery-powered instruments DRVDD DRGND Hand-held scopemeters Figure 1. Low cost digital oscilloscopes Fabricated on an advanced CMOS process, the AD9248 is GENERAL DESCRIPTION available in a Pb-free, space saving, 64-lead LQFP or LFCSP and is specified over the industrial temperature range (40C to The AD9248 is a dual, 3 V, 14-bit, 20 MSPS/40 MSPS/65 MSPS +85C). analog-to-digital converter (ADC). It features dual high performance sample-and hold amplifiers (SHAs) and an PRODUCT HIGHLIGHTS integrated voltage reference. The AD9248 uses a multistage 1. Pin-compatible with the AD9238, 12-bit 20 MSPS/ differential pipelined architecture with output error correction 40 MSPS/65 MSPS ADC. logic to provide 14-bit accuracy and to guarantee no missing 2. Speed grade options of 20 MSPS, 40 MSPS, and 65 MSPS codes over the full operating temperature range at up to allow flexibility between power, cost, and performance to suit 65 MSPS data rates. The wide bandwidth, differential SHA an application. allows for a variety of user-selectable input ranges and offsets, including single-ended applications. It is suitable for various 3. Low power consumption: AD9248-65: 65 MSPS = 600 mW, applications, including multiplexed systems that switch full- AD9248-40: 40 MSPS = 330 mW, and AD9248-20: 20 MSPS = scale voltage levels in successive channels and for sampling 180 mW. inputs at frequencies well beyond the Nyquist rate. 4. Typical channel isolation of 85 dB fIN = 10 MHz. Dual single-ended clock inputs are used to control all internal 5. The clock duty cycle stabilizer (AD9248-20/AD9248-40/ conversion cycles. A duty cycle stabilizer is available and can AD9248-65) maintains performance over a wide range of compensate for wide variations in the clock duty cycle, allowing clock duty cycles. the converter to maintain excellent performance. The digital 6. Multiplexed data output option enables single-port operation output data is presented in either straight binary or twos from either Data Port A or Data Port B. complement format. Out-of-range signals indicate an overflow condition, which can be used with the most significant bit to determine low or high overflow. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Specifications subject to change without notice. No license is granted by implication Tel: 781.329.4700 www.analog.com or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 20052010 Analog Devices, Inc. All rights reserved. 04446-001AD9248 TABLE OF CONTENTS Specifications ..................................................................................... 3 Clock Circuitry ........................................................................... 22 DC Specifications ......................................................................... 3 Analog Inputs ............................................................................. 22 AC Specifications .......................................................................... 5 Reference Circuitry .................................................................... 22 Digital Specifications ................................................................... 6 Digital Control Logic ................................................................. 22 Switching Specifications .............................................................. 7 Outputs ........................................................................................ 22 Absolute Maximum Ratings ............................................................ 8 LQFP Evaluation Board Bill of Materials (BOM) .................. 24 Explanation of Test Levels ........................................................... 8 LQFP Evaluation Board Schematics ........................................ 25 ESD Caution .................................................................................. 8 LQFP PCB Layers ....................................................................... 29 Pin Configurations and Function Descriptions ........................... 9 Dual ADC LFCSP PCB .................................................................. 35 Terminology .................................................................................... 11 Power Connector ........................................................................ 35 Typical Performance Characteristics ........................................... 12 Analog Inputs ............................................................................. 35 Equivalent Circuits ......................................................................... 16 Optional Operational Amplifier .............................................. 35 Theory of Operation ...................................................................... 17 Clock ............................................................................................ 35 Analog Input ............................................................................... 17 Voltage Reference ....................................................................... 35 Clock Input and Considerations .............................................. 18 Data Outputs ............................................................................... 35 Power Dissipation and Standby Mode ..................................... 19 LFCSP Evaluation Board Bill of Materials (BOM) ................ 36 Digital Outputs ........................................................................... 19 LFCSP PCB Schematics ............................................................. 37 Timing .......................................................................................... 19 LFCSP PCB Layers ..................................................................... 40 Data Format ................................................................................ 20 Thermal Considerations ............................................................ 45 Voltage Reference ....................................................................... 20 Outline Dimensions ....................................................................... 46 AD9248 LQFP Evaluation Board ................................................. 22 Ordering Guide .......................................................................... 47 REVISION HISTORY 11/10Rev. A to Rev. B Changes to Terminology ............................................................... 11 Changes to Absolute Maximum Ratings Section ......................... 8 Changes to Figure 22 ...................................................................... 15 Changes to Figure 3 .......................................................................... 9 Changes to Clock Input and Considerations Section ................ 18 Add Figure 4 Renumbered Sequentially ....................................... 9 Changes to Timing Section ........................................................... 19 Changes to Theory of Operation Section and Analog Input Changes to Figure 33 ...................................................................... 19 Section .............................................................................................. 17 Changes to Data Format Section .................................................. 20 Deleted Note 1 from Dual ADC LFCSP PCB Section ............... 35 Changes to Table 10 ....................................................................... 24 Updated Outline Dimensions ....................................................... 46 Changes to Figure 39 ...................................................................... 25 Changes to Table 13 ....................................................................... 36 3/05Rev. 0 to Rev. A Updated Outline Dimensions ....................................................... 46 Added LFCSP ...................................................................... Universal Changes to Ordering Guide .......................................................... 47 Changes to Features .......................................................................... 1 Changes to Applications .................................................................. 1 1/05Revision 0: Initial Version Changes to General Description .................................................... 1 Changes to Product Highlights ....................................................... 1 Changes to Table 6 .......................................................................... 10 Rev. B Page 2 of 48