Quad, 12-Bit, 40 MSPS/65 MSPS Serial LVDS 1.8 V A/D Converter Data Sheet AD9228 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD PDWN 4 ADCs integrated into 1 package DRVDD DRGND 119 mW ADC power per channel at 65 MSPS AD9228 12 SNR = 70 dB (to Nyquist) VIN + A SERIAL D + A PIPELINE D A VIN A LVDS ENOB = 11.3 bits ADC 12 SFDR = 82 dBc (to Nyquist) VIN + B PIPELINE SERIAL D + B Excellent linearity D B VIN B ADC LVDS DNL = 0.3 LSB (typical) 12 VIN + C SERIAL D + C PIPELINE INL = 0.4 LSB (typical) LVDS D C VIN C ADC Serial LVDS (ANSI-644, default) 12 VIN + D SERIAL PIPELINE D + D Low power, reduced signal option (similar to IEEE 1596.3) LVDS VIN D D D ADC Data and frame clock outputs VREF 315 MHz full power analog bandwidth SENSE FCO+ + 0.5V FCO DATA RATE 2 V p-p input voltage range REFT REF MULTIPLIER SERIAL PORT DCO+ 1.8 V supply operation REFB SELECT INTERFACE DCO Serial port control Full chip and individual channel power-down modes RBIASAGND CSB SDIO/ODM SCLK/DTP CLK+ CLK Flexible bit orientation Built in and custom digital test pattern generation Figure 1. Programmable clock and data alignment PRODUCT HIGHLIGHTS Programmable output resolution Standby mode 1. Small Footprint. Four ADCs are contained in a small, space- saving package. APPLICATIONS 2. Low power of 119 mW/channel at 65 MSPS. Medical imaging and nondestructive ultrasound 3. Ease of Use. A data clock output (DCO) is provided that Portable ultrasound and digital beam-forming systems operates at frequencies of up to 390 MHz and supports Quadrature radio receivers double data rate (DDR) operation. Diversity radio receivers 4. User Flexibility. The SPI control offers a wide range of flexible Tape drives features to meet specific system requirements. Optical networking 5. Pin-Compatible Family. This includes the AD9287 (8-bit), Test equipment AD9219 (10-bit), and AD9259 (14-bit). GENERAL DESCRIPTION capturing data on the output and a frame clock output (FCO) The AD9228 is a quad, 12-bit, 40/65 MSPS analog-to-digital con- for signaling a new output byte are provided. Individual verter (ADC) with an on-chip sample-and-hold circuit designed channel power-down is supported and typically consumes for low cost, low power, small size, and ease of use. The product <2 mW when all channels are disabled. operates at a conversion rate of up to 65 MSPS and is optimized for outstanding dynamic performance and low power in applications The ADC contains several features designed to maximize flexibility where a small package size is critical. and minimize system cost, such as programmable clock and data The ADC requires a single 1.8 V power supply and LVPECL-/ alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and CMOS-/LVDS-compatible sample rate clock for full performance pseudorandom patterns, along with custom user-defined test operation. No external reference or driver components are patterns entered via the serial port interface (SPI). required for many applications. The AD9228 is available in an RoHS compliant, 48-lead LFCSP. It The ADC automatically multiplies the sample rate clock for the is specified over the industrial temperature range of 40C to appropriate LVDS serial data rate. A data clock output (DCO) for +85C. Rev. G Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 20062020 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Technical Support www.analog.com Devices. Trademarks and registered trademarks are the property of their respective owners. 05727-001AD9228 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Analog Input Considerations ................................................... 20 Applications ...................................................................................... 1 Clock Input Considerations ..................................................... 23 General Description ......................................................................... 1 Serial Port Interface (SPI) ............................................................. 31 Functional Block Diagram .............................................................. 1 Hardware Interface .................................................................... 31 Product Highlights ........................................................................... 1 Memory Map .................................................................................. 33 Revision History ............................................................................... 3 Reading the Memory Map Table ............................................. 33 Specifications .................................................................................... 4 Reserved Locations .................................................................... 33 AC Specifications ......................................................................... 5 Default Values ............................................................................ 33 Digital Specifications ................................................................... 6 Logic Levels ................................................................................. 33 Switching Specifications .............................................................. 7 Evaluation Board ............................................................................ 37 Timing Diagrams .............................................................................. 8 Power Supplies ........................................................................... 37 Absolute Maximum Ratings ......................................................... 10 Input Signals ............................................................................... 37 Thermal Impedance ................................................................... 10 Output Signals ............................................................................ 37 ESD Caution................................................................................ 10 Default Operation and Jumper Selection Settings ................ 38 Pin Configuration and Function Descriptions .......................... 11 Alternative Analog Input Drive Configuration ..................... 39 Equivalent Circuits ......................................................................... 13 Outline Dimensions ....................................................................... 53 Typical Performance Characteristics ........................................... 15 Ordering Guide .......................................................................... 53 Theory of Operation ...................................................................... 20 Rev. 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