4-Channel, Software-Selectable, True Bipolar Input, 12-Bit Plus Sign ADC Data Sheet AD7324 FEATURES FUNCTIONAL BLOCK DIAGRAM V REFIN/OUT V DD CC 12-bit plus sign SAR ADC AD7324 True bipolar input ranges Software-selectable input ranges 2.5V 10 V, 5 V, 2.5 V, 0 V to +10 V V 0 IN VREF 13-BIT V 1 IN I/P 1 MSPS throughput rate SUCCESSIVE T/H MUX V 2 APPROXIMATION IN 4 analog input channels with channel sequencer ADC V 3 IN Single-ended, true differential, and pseudo differential analog input capability High analog input impedance DOUT Low power: 21 mW SCLK CHANNEL CONTROL LOGIC AND REGISTERS SEQUENCER Full power signal bandwidth: 22 MHz CS DIN Internal 2.5 V reference High speed serial interface V DRIVE Power-down modes 16-lead TSSOP package AGND V DGND SS iCMOS process technology Figure 1. GENERAL DESCRIPTION PRODUCT HIGHLIGHTS 1 The AD7324 is a 4-channel, 12-bit plus sign, successive 1. The AD7324 can accept true bipolar analog input signals, 10 V, 5 V, 2.5 V, and 0 V to +10 V unipolar signals. approximation ADC designed on the iCMOS (industrial CMOS) process. iCMOS is a process combining high voltage 2. The four analog inputs can be configured as four single- silicon with submicron CMOS and complementary bipolar ended inputs, two true differential input pairs, two pseudo technologies. It enables the development of a wide range of high differential inputs, or three pseudo differential inputs. performance analog ICs capable of 33 V operation in a footprint 3. 1 MSPS serial interface. SPI-/QSPI-/DSP-/MICROWIRE- that no previous generation of high voltage parts could achieve. compatible interface. Unlike analog ICs using conventional CMOS processes, iCMOS components can accept bipolar input signals while providing 4. Low power, 31 mW maximum, at 1 MSPS throughput rate. increased performance, dramatically reduced power consumption, 5. Channel sequencer. and reduced package size. Table 1. Similar Products Selection Table The AD7324 can accept true bipolar analog input signals. The Device Throughput Number of AD7324 has four software-selectable input ranges: 10 V, 5 V, Number Rate Number of bits Channels 2.5 V, and 0 V to +10 V. Each analog input channel can be AD7329 1000 kSPS 12-bit plus sign 8 independently programmed to one of the four input ranges. AD7328 1000 kSPS 12-bit plus sign 8 The analog input channels on the AD7324 can be programmed AD7327 500 kSPS 12-bit plus sign 8 to be single-ended, true differential, or pseudo differential. AD7323 500 kSPS 12-bit plus sign 4 The ADC contains a 2.5 V internal reference. The AD7324 also AD7322 1000 kSPS 12-bit plus sign 2 allows for external reference operation. If a 3 V reference is AD7321 500 kSPS 12-bit plus sign 2 applied to the REFIN/OUT pin, the AD7324 can accept a true bipolar 12 V analog input. Minimum 12 V V and V DD SS supplies are required for the 12 V input range. The ADC has a high speed serial interface that can operate at throughput rates up to 1 MSPS. 1 Protected by U.S. Patent No. 6,731,232. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20052013 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 04864-001AD7324 Data Sheet TABLE OF CONTENTS Control Register ......................................................................... 22 Features .............................................................................................. 1 Sequence Register ....................................................................... 23 Functional Block Diagram .............................................................. 1 Range Register ............................................................................ 24 General Description ......................................................................... 1 Sequencer Operation ..................................................................... 25 Product Highlights ........................................................................... 1 Reference ..................................................................................... 27 Revision History ............................................................................... 2 V ............................................................................................ 27 DRIVE Specifications ..................................................................................... 3 Modes of Operation ....................................................................... 28 Timing Specifications .................................................................. 7 Normal Mode .............................................................................. 28 Absolute Maximum Ratings ............................................................ 8 Full Shutdown Mode .................................................................. 28 ESD Caution .................................................................................. 8 Autoshutdown Mode ................................................................. 29 Pin Configuration and Function Description .............................. 9 Autostandby Mode ..................................................................... 29 Typical Performance Characteristics ........................................... 10 Power vs. Throughput Rate ....................................................... 30 Terminology .................................................................................... 14 Serial Interface ................................................................................ 31 Theory of Operation ...................................................................... 16 Microprocessor Interfacing ........................................................... 32 Circuit Information .................................................................... 16 AD7324 to ADSP-218x .............................................................. 32 Converter Operation .................................................................. 16 AD7324 to ADSP-BF53x ........................................................... 32 Analog Input Structure .............................................................. 17 Application Hints ........................................................................... 33 Typical Connection Diagram ................................................... 19 Layout and Grounding .............................................................. 33 Analog Input ............................................................................... 19 Power Supply Configuration .................................................... 33 Driver Amplifier Choice ............................................................ 21 Outline Dimensions ....................................................................... 34 Registers ........................................................................................... 22 Ordering Guide .......................................................................... 34 Addressing Registers .................................................................. 22 REVISION HISTORY 12/13Rev. A to Rev. B Changes to Circuit Information Section and Table 6 ................ 16 Changes to Addressing Registers Section .................................... 22 Changes to Power Supply Configuration Section ...................... 33 1/10Rev. 0 to Rev. A Changes to Table 2 ............................................................................ 5 Change to Endnote 1 in Table 4 ...................................................... 8 Added Power Supply Configuration Section, Figure 54, and Table 16 ..................................................................................... 33 12/05Revision 0: Initial Version Rev. B Page 2 of 36