2.7 V to 5.5 V, Serial-Input, Voltage Output, Unbuffered 16-Bit DAC Data Sheet AD5541A FEATURES FUNCTIONAL BLOCK DIAGRAMS V DD 16-bit resolution 11.8 nV/Hz noise spectral density AD5541A 1 s settling time 16-BIT DAC V REF OUT 1.1 nV-sec glitch energy AGND 0.05 ppm/C temperature drift 5 kV HBM ESD classification V LOGIC 16-BIT DAC LATCH 0.375 mW power consumption at 3 V CS 2.7 V to 5.5 V single-supply operation CONTROL DIN LOGIC Hardware CS and LDAC functions SERIAL INPUT REGISTER SCLK 50 MHz SPI-/QSPI-/MICROWIRE-/DSP-compatible interface LDAC Power-on reset clears DAC output to zero scale Available in 3 mm 3 mm, 8-/10-lead LFCSP and 10-lead DGND MSOP Figure 1. AD5541A APPLICATIONS V DD Automatic test equipment AD5541A-1 Precision source-measure instruments V REF 16-BIT DAC OUT Data acquisition systems Medical instrumentation Aerospace instrumentation 16-BIT DAC LATCH CS Communications infrastructure equipment DIN CONTROL Industrial control LOGIC SERIAL INPUT REGISITER SCLK CLR GND Figure 2. AD5541A-1 The AD5541A uses a versatile 3-wire interface that is compatible GENERAL DESCRIPTION with 50 MHz SPI, QSPI, MICROWIRE, and DSP interface The AD5541A is a single, 16-bit, serial input, unbuffered voltage standards. output digital-to-analog converter (DAC) that operates from a single 2.7 V to 5.5 V supply. Table 1. Related Devices Part No. Description The DAC output range extends from 0 V to VREF and is guaranteed AD5040/AD5060 2.7 V to 5.5 V 14-/16-bit buffed output DACs monotonic, providing 1 LSB INL accuracy at 16 bits without AD5541/AD5542 2.7 V to 5.5 V 16-bit voltage output DACs adjustment over the full specified temperature range of 40C AD5781/AD5791 18-/20-bit voltage output DACs to +125C. The AD5541A is available in a 3 mm 3 mm, 10-lead AD5024/AD5064 4.5 V to 5.5 V, 12-/16-bit quad channel DACs LFCSP and 10-lead MSOP. The AD5541A-1 is available in a AD5061 Single, 16-bit nanoDAC, 4 LSB INL, SOT-23 3 mm 3 mm, 8-lead LFCSP. AD5542A 16-bit, bipolar, voltage output DAC Offering unbuffered outputs, the AD5541A achieves a 1 s set- PRODUCT HIGHLIGHTS tling time with low power consumption and low offset errors. Providing low noise performance of 11.8 nV/Hz and low 1. 16-bit performance without adjustment. glitch, the AD5541A is suitable for deployment across multiple 2. 2.7 V to 5.5 V single operation. end systems. 3. Low 11.8 nV/Hz noise spectral density. 4. Low 0.05 ppm/C temperature drift. 5. 3 mm 3 mm LFCSP and MSOP packaging. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20102018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 08516-002 08516-001AD5541A Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Serial Interface ............................................................................ 14 Applications ....................................................................................... 1 Unipolar Output Operation ...................................................... 15 Functional Block Diagrams ............................................................. 1 Output Amplifier Selection ....................................................... 15 General Description ......................................................................... 1 Force Sense Amplifier Selection ............................................... 16 Product Highlights ........................................................................... 1 Reference and Ground ............................................................... 16 Revision History ............................................................................... 2 Power-On Reset .......................................................................... 16 Specifications ..................................................................................... 3 Power Supply and Reference Bypassing .................................. 16 AC Characteristics ........................................................................ 4 Applications Information .............................................................. 17 Timing Characteristics ................................................................ 5 Microprocessor Interfacing ....................................................... 17 Absolute Maximum Ratings ............................................................ 6 AD5541A to ADSP-BF531 Interface ....................................... 17 ESD Caution .................................................................................. 6 AD5541A to SPORT Interface .................................................. 17 Pin Configurations and Function Descriptions ........................... 7 Layout Guidelines....................................................................... 17 Typical Performance Characteristics ............................................. 9 Galvanically Isolated Interface ................................................. 17 Terminology .................................................................................... 13 Decoding Multiple DACs .......................................................... 18 Theory of Operation ...................................................................... 14 Outline Dimensions ....................................................................... 19 Digital-to-Analog Section ......................................................... 14 Ordering Guide .......................................................................... 20 REVISION HISTORY 4/2018Rev. A to Rev. B Changes to Figure 3 ........................................................................... 5 Changes to Table 5 ............................................................................. 6 Change to Output Noise Parameter, Table 3 ................................. 4 Changes to Figure 25 ...................................................................... 12 Changes to Table 6 ............................................................................. 7 Updated Outline Dimensions ....................................................... 19 Added Figure 5 and Figure 6 ............................................................ 8 Changes to Ordering Guide .......................................................... 20 Added Table 7 Renumbered Sequentially ..................................... 8 Changes to Figure 15 ...................................................................... 10 3/2011Rev. 0 to Rev. A Changed V to V 1 LSB in Unipolar Output Operation REF REF Added 10-Lead LFCSP and 8-Lead LFCSP ..................... Universal Section .............................................................................................. 15 Changes to Features, General Description, and Product Updated Outline Dimensions ....................................................... 18 Highlights Sections and Table 1 ..................................................... 1 Changes to Ordering Guide .......................................................... 18 Added Figure 2 Renumbered Sequentially .................................. 1 Changes to Logic Inputs Parameter, Table 1 ................................. 3 7/2010Revision 0: Initial Version Rev. B Page 2 of 20