Data Sheet AD4695/AD4696 16-Bit, 16-Channel, 500 kSPS/1 MSPS, Easy Drive Multiplexed SAR ADC FEATURES GENERAL DESCRIPTION Easy Drive The AD4695/AD4696 are compact, high accuracy, low power, 16- channel, 16-bit, 500 kSPS/1 MSPS, multiplexed input precision, Reduced analog input and reference drive requirements successive approximation register (SAR) analog-to-digital convert- On-chip reference buffer (WLCSP only) ers (ADCs) with Easy Drive features and extensive digital function- Overvoltage protection up to 5 mA on each analog input ality. Long acquisition phase, 71.5% (715 ns/1000 ns) of cycle The AD4695/AD4696 are optimal for use in space constrained, time at 1 MSPS multichannel, precision data acquisition systems and monitoring High performance circuits. The AD4695/AD4696 feature a true 16-bit SAR ADC core Sample rate: 500 kSPS (AD4695) or 1 MSPS (AD4696) with no missing codes, a 16-channel, low crosstalk multiplexer, a INL: 1.0 LSB maximum flexible channel sequencer, overvoltage protection clamp circuits on Guaranteed 16-bit, no missing codes each analog input, on-chip oversampling and decimation, threshold SINAD: 93 dB typical, f = 1 kHz detection and alert indicators, and an autonomous conversion (au- IN tocycle) mode. Oversampled dynamic range: 111.2 dB, OSR = 64 Small footprint, high channel density The AD4695/AD4696 Easy Drive features relax the drive require- 32-lead 5 mm 5 mm LFCSP ments of the analog front end (AFE) and reference circuitry. Analog 36-ball 2.96 mm 2.96 mm WLCSP input high-Z mode and reference input high Z mode simplify system designs, reduce component count, and increase channel density Easy Drive features support system level designs with fewer by removing the need for dedicated high speed ADC drivers and components reference buffers. The WLCSP option of the AD4695/AD4696 in- Enhanced digital functionality cludes an internal reference buffer, which provides a true, buffered First conversion accurate, no latency or pipeline delay reference input. Fast conversion time and dual-/quad-SDO modes allow low SPI clock rates Input overvoltage protection clamps on each analog input protect the AD4695/AD4696 from overvoltage events and prevent overvolt- Customizable channel sequencer age events on one channel from degrading performance on other On-chip oversampling and decimation channels (see Figure 27). Threshold detection alerts Advanced digital functionality makes the AD4695/AD4696 compati- Offset and gain correction ble with a variety of low power digital hosts. The low serial periph- Autonomous conversion (autocycle) mode eral interface (SPI) clock rate requirements, on-chip customizable 1.14 V to 1.98 V logic SPI channel sequencers, and oversampling and decimation reduce the Low power burden on the digital host system. Autocycle mode and threshold 8 mW at f = 1 MSPS and 4 mW at f = 500 kSPS S S detection features enable low power, interrupt driven firmware de- 4 W standby power dissipation with the internal LDO disa- sign by performing conversions autonomously and generating alerts bled based on channel specific threshold limits. Internal LDO enables 3.15 V to 5.5 V, single analog supply The AD4695/AD4696 are available in a 5 mm 5 mm 32-lead operation lead frame chip scale package (LFCSP) and a 2.96 mm 2.96 Wide operating temperature range: 40C to +125C mm 36-ball wafer level chip scale package (WLCSP) with operation specified from 40C to +125C. APPLICATIONS Photodiode monitoring Medical instrumentation Vital signs monitoring Electronic test and measurement Automated test equipment Instrumentation and process control Battery-powered equipment Rev. A Information furnished by Analog Devices is believed to be accurate and reliableas i. However, no responsibility is assumed by Analog DOCUMENT FEEDBACK Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and TECHNICAL SUPPORT registered trademarks are the property of their respective owners.Data Sheet AD4695/AD4696 TABLE OF CONTENTS Features................................................................ 1 Channel Sequencing Modes............................ 41 Applications........................................................... 1 Digital Interface....................................................46 General Description...............................................1 Register Configuration Mode............................46 Functional Block Diagram......................................5 Conversion Mode............................................. 53 Specifications........................................................ 6 Autocycle Mode................................................60 Timing Specifications........................................11 General-Purpose Pins......................................62 Absolute Maximum Ratings.................................13 Device Reset....................................................63 Thermal Resistance......................................... 13 Applications Information...................................... 66 Electrostatic Discharge (ESD) Ratings.............13 Analog Front-End Design.................................67 ESD Caution.....................................................13 Analog Input Overvoltage Protection................70 Pin Configuration and Function Descriptions...... 14 Reference Circuitry Design.............................. 70 Typical Performance Characteristics...................17 Optimizing Reference Buffer Startup................72 Terminology......................................................... 27 Converting Between Codes and Volts..............73 Theory of Operation.............................................28 Oversampling for Noise Reduction...................73 Overview.......................................................... 28 Digital Interface Operation................................73 Converter Operation.........................................28 Device Configuration Recommendations.........80 Transfer Function............................................. 30 Effective Channel Sample Rate....................... 81 Analog Inputs................................................... 32 Layout Guidelines.............................................83 Input Overvoltage Protection Clamps...............35 Evaluating AD4695/AD4696 Performance.......84 Temperature Sensor.........................................36 Register Information............................................ 85 Voltage Reference Input...................................36 Register Overview............................................85 Power Supplies................................................ 37 Register Details................................................86 Oversampling and Decimation......................... 38 Outline Dimensions........................................... 106 Offset and Gain Correction...............................39 Ordering Guide ..............................................106 Threshold Detection and Alert Indicators......... 39 Evaluation Boards.......................................... 107 Busy Indicator...................................................41 REVISION HISTORY 5/2022Rev. 0 to Rev. A Added 36-Ball WLCSP.....................................................................................................................................1 Changed Master to Host and 0x0xx to 0x00xx Throughout.............................................................................1 Changes to Features Section.......................................................................................................................... 1 Changes to General Description Section.........................................................................................................1 Changes to Figure 1........................................................................................................................................ 5 Changes to Specifications Section and Table 1...............................................................................................6 Added Note 6 and Note 7, Table 1 Renumbered Sequentially....................................................................... 6 Changes to Timing Specifications Section.....................................................................................................11 Changes to Reference Inputs Parameter, Table 3.........................................................................................13 Changes to Thermal Resistance Section and Table 4...................................................................................13 Added Table 6, Renumbered Sequentially.....................................................................................................13 Changes to Table 7........................................................................................................................................14 Added Figure 3 and Table 8 Renumbered Sequentially .............................................................................. 15 Changes to Typical Performance Characteristics Section.............................................................................17 Changes to Overview Section........................................................................................................................28 Changes to Figure 68 Caption to Figure 70 Caption..................................................................................... 33 Changes to Analog Input High-Z Mode Section.............................................................................................33 Changes to Overvoltage Reduced Current Mode Section.............................................................................35 Changes to Temperature Sensor Section......................................................................................................36 analog.com Rev. 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