AS6C3216A-55BIN Revision History 2048K x 16bit Low Power CMOS SRAM AS6C3216A-55BIN 48ball FBGA PACKAGE Date Revision Details Rev 1.0 Preliminary datasheet June 08 2017 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1 of 11 - Rev.1.0 June 2017AS6C3216A-55BIN FEATURE GENERAL DESCRIPTION The AS6C3216A-55BIN is a 33,554,432-bit low n Fast access time : 55ns n Low power consumption: power CMOS static random access memory organized as 2,097,152 words by 16 bits. It is Operating current : 12mA (TYP.) fabricated using very high performance, high Standby current : 8A (TYP.) n Single 2.7V ~ 3.6V power supply reliability CMOS technology. Its standby current is stable within the range of operating temperature. n All inputs and outputs TTL compatible n Fully static operation The AS6C3216A-55BIN is well designed for low n Tri-state output power application, and particularly well suited for n Data byte control : LB (DQ0 ~ DQ7) battery back-up nonvolatile memory application. UB (DQ8 ~ DQ15) n Data retention voltage : 1.2V (MIN.) The AS6C3216A-55BIN operates from a single n ROHS Compliant n Package : 48-ball 8mm x 10mm TFBGA power supply of 2.7V ~ 3.6V and all inputs and outputs are fully TTL compatible PRODUCT FAMILY Product Operating Power Dissipation V Range Speed CC Family Temperature Standby(I ,TYP.) Operating(I ,TYP.) SB1 CC AS6C3216A-55BIN 2.7 ~ 3.6V 55ns 8A 12mA -40 ~ 85 FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION SYMBOL DESCRIPTION Vcc A0 - A20 Address Inputs Vss DQ0 - DQ15 Data Inputs/Outputs CE , CE2 Chip Enable Input 2048Kx16 A0-A20 DECODER MEMORY ARRAY WE Write Enable Input OE Output Enable Input LB Lower Byte Control UB Upper Byte Control V Power Supply CC DQ0-DQ7 V Ground SS Lower Byte I/O DATA COLUMN I/O NC No Connection CIRCUIT DQ8-DQ15 Upper Byte CE CE2 WE CONTROL OE CIRCUIT LB UB Confidential - 2 of 11 - Rev.1.0 June 2017